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📄 add2.map.rpt

📁 两个4bit超前进位加法器实现8bit加法器
💻 RPT
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+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 0     ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+---------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: add1:a1|lpm_add_sub:Add0 ;
+------------------------+-------------+------------------------------------+
; Parameter Name         ; Value       ; Type                               ;
+------------------------+-------------+------------------------------------+
; LPM_WIDTH              ; 5           ; Untyped                            ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                            ;
; LPM_DIRECTION          ; ADD         ; Untyped                            ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                            ;
; LPM_PIPELINE           ; 0           ; Untyped                            ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                            ;
; REGISTERED_AT_END      ; 0           ; Untyped                            ;
; OPTIMIZE_FOR_SPEED     ; 1           ; Untyped                            ;
; USE_CS_BUFFERS         ; 1           ; Untyped                            ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                            ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                 ;
; DEVICE_FAMILY          ; FLEX10K     ; Untyped                            ;
; USE_WYS                ; OFF         ; Untyped                            ;
; STYLE                  ; FAST        ; Untyped                            ;
; CBXI_PARAMETER         ; add_sub_ojh ; Untyped                            ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                     ;
+------------------------+-------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: add1:a2|lpm_add_sub:Add0 ;
+------------------------+-------------+------------------------------------+
; Parameter Name         ; Value       ; Type                               ;
+------------------------+-------------+------------------------------------+
; LPM_WIDTH              ; 6           ; Untyped                            ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                            ;
; LPM_DIRECTION          ; ADD         ; Untyped                            ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                            ;
; LPM_PIPELINE           ; 0           ; Untyped                            ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                            ;
; REGISTERED_AT_END      ; 0           ; Untyped                            ;
; OPTIMIZE_FOR_SPEED     ; 1           ; Untyped                            ;
; USE_CS_BUFFERS         ; 1           ; Untyped                            ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                            ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                 ;
; DEVICE_FAMILY          ; FLEX10K     ; Untyped                            ;
; USE_WYS                ; OFF         ; Untyped                            ;
; STYLE                  ; FAST        ; Untyped                            ;
; CBXI_PARAMETER         ; add_sub_pjh ; Untyped                            ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                     ;
+------------------------+-------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Sun May 27 13:27:58 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off add2 -c add2
Warning (10275): Verilog HDL Module Instantiation warning at add2.v(15): ignored dangling comma in List of Port Connections
Info: Found 2 design units, including 2 entities, in source file add2.v
    Info: Found entity 1: add1
    Info: Found entity 2: add2
Info: Elaborating entity "add2" for the top level hierarchy
Info: Elaborating entity "add1" for hierarchy "add1:a1"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a1|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "add1:a1|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "5"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a2|lpm_add_sub:Add0"
Info: Elaborated megafunction instantiation "add1:a2|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "add1:a2|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a2|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a2|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "add1:a2|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a2|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a2|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "add1:a2|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a2|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "add1:a2|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "add1:a2|lpm_add_sub:Add0"
Info: Instantiated megafunction "add1:a2|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "6"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Implemented 34 device resources after synthesis - the final resource count might be different
    Info: Implemented 16 input pins
    Info: Implemented 9 output pins
    Info: Implemented 9 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Processing ended: Sun May 27 13:28:00 2007
    Info: Elapsed time: 00:00:03


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