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📄 division.tan.qmsg

📁 很实用的一个分频带码
💻 QMSG
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{ "Info" "ITDB_FULL_TPD_RESULT" "input\[6\] led3\[0\] 17.800 ns Longest " "Info: Longest tpd from source pin \"input\[6\]\" to destination pin \"led3\[0\]\" is 17.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns input\[6\] 1 PIN PIN_10 9 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_10; Fanout = 9; PIN Node = 'input\[6\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "division" "UNKNOWN" "V1" "H:/实验程序of yys/EDA_design/division/db/division.quartus_db" { Floorplan "H:/实验程序of yys/EDA_design/division/" "" "" { input[6] } "NODE_NAME" } "" } } { "division.vhd" "" { Text "H:/实验程序of yys/EDA_design/division/division.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.400 ns) + CELL(2.300 ns) 10.200 ns decoder:u3\|de\[0\]~43 2 COMB LC5_A23 1 " "Info: 2: + IC(4.400 ns) + CELL(2.300 ns) = 10.200 ns; Loc. = LC5_A23; Fanout = 1; COMB Node = 'decoder:u3\|de\[0\]~43'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "division" "UNKNOWN" "V1" "H:/实验程序of yys/EDA_design/division/db/division.quartus_db" { Floorplan "H:/实验程序of yys/EDA_design/division/" "" "6.700 ns" { input[6] decoder:u3|de[0]~43 } "NODE_NAME" } "" } } { "decoder.vhd" "" { Text "H:/实验程序of yys/EDA_design/division/decoder.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(5.100 ns) 17.800 ns led3\[0\] 3 PIN PIN_65 0 " "Info: 3: + IC(2.500 ns) + CELL(5.100 ns) = 17.800 ns; Loc. = PIN_65; Fanout = 0; PIN Node = 'led3\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "division" "UNKNOWN" "V1" "H:/实验程序of yys/EDA_design/division/db/division.quartus_db" { Floorplan "H:/实验程序of yys/EDA_design/division/" "" "7.600 ns" { decoder:u3|de[0]~43 led3[0] } "NODE_NAME" } "" } } { "division.vhd" "" { Text "H:/实验程序of yys/EDA_design/division/division.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "10.900 ns ( 61.24 % ) " "Info: Total cell delay = 10.900 ns ( 61.24 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.900 ns ( 38.76 % ) " "Info: Total interconnect delay = 6.900 ns ( 38.76 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "division" "UNKNOWN" "V1" "H:/实验程序of yys/EDA_design/division/db/division.quartus_db" { Floorplan "H:/实验程序of yys/EDA_design/division/" "" "17.800 ns" { input[6] decoder:u3|de[0]~43 led3[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "17.800 ns" { input[6] input[6]~out decoder:u3|de[0]~43 led3[0] } { 0.000ns 0.000ns 4.400ns 2.500ns } { 0.000ns 3.500ns 2.300ns 5.100ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "any_even:u4\|lpm_counter:coutQ_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[1\] input\[7\] clk -10.400 ns register " "Info: th for register \"any_eve

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