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📄 division.map.eqn

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D1L71 = D1L11 & J8L23 & (!K2_q[5]);


--D1L28 is any_odd:U5|LessThan~2312
--operation mode is normal

D1L28 = !D1L27 & (K2_q[4] # !J8L19 # !D1L12);

--D1L72 is any_odd:U5|LessThan~2369
--operation mode is normal

D1L72 = !D1L27 & (K2_q[4] # !J8L19 # !D1L12);

--D1L73 is any_odd:U5|LessThan~2370
--operation mode is normal

D1L73 = !D1L27 & (K2_q[4] # !J8L19 # !D1L12);


--D1L38 is any_odd:U5|LessThan~2327
--operation mode is normal

D1L38 = (K2_q[7] & (J8L31 # K2_q[6] # !J8L27) # !K2_q[7] & J8L31 & (K2_q[6] # !J8L27)) & CASCADE(D1L73);

--D1L74 is any_odd:U5|LessThan~2371
--operation mode is normal

D1L74 = (K2_q[7] & (J8L31 # K2_q[6] # !J8L27) # !K2_q[7] & J8L31 & (K2_q[6] # !J8L27)) & CASCADE(D1L73);


--D1L29 is any_odd:U5|LessThan~2314
--operation mode is normal

D1L29 = K1_q[3] & !J2L13 & (K1_q[2] $ J2L9) # !K1_q[3] & J2L13 & (K1_q[2] $ J2L9);

--D1L75 is any_odd:U5|LessThan~2372
--operation mode is normal

D1L75 = K1_q[3] & !J2L13 & (K1_q[2] $ J2L9) # !K1_q[3] & J2L13 & (K1_q[2] $ J2L9);

--D1L76 is any_odd:U5|LessThan~2373
--operation mode is normal

D1L76 = K1_q[3] & !J2L13 & (K1_q[2] $ J2L9) # !K1_q[3] & J2L13 & (K1_q[2] $ J2L9);


--D1L39 is any_odd:U5|LessThan~2328
--operation mode is normal

D1L39 = (K1_q[1] & !K1_q[0] & !J2L1 & !J2L5 # !K1_q[1] & (!K1_q[0] & !J2L1 # !J2L5)) & CASCADE(D1L76);

--D1L77 is any_odd:U5|LessThan~2374
--operation mode is normal

D1L77 = (K1_q[1] & !K1_q[0] & !J2L1 & !J2L5 # !K1_q[1] & (!K1_q[0] & !J2L1 # !J2L5)) & CASCADE(D1L76);


--D1L30 is any_odd:U5|LessThan~2316
--operation mode is normal

D1L30 = D1L15 & (!K1_q[5] & !J2L21);

--D1L78 is any_odd:U5|LessThan~2375
--operation mode is normal

D1L78 = D1L15 & (!K1_q[5] & !J2L21);


--D1L31 is any_odd:U5|LessThan~2317
--operation mode is normal

D1L31 = !D1L30 & (K1_q[4] # J2L17 # !D1L16);

--D1L79 is any_odd:U5|LessThan~2376
--operation mode is normal

D1L79 = !D1L30 & (K1_q[4] # J2L17 # !D1L16);

--D1L80 is any_odd:U5|LessThan~2377
--operation mode is normal

D1L80 = !D1L30 & (K1_q[4] # J2L17 # !D1L16);


--D1L40 is any_odd:U5|LessThan~2329
--operation mode is normal

D1L40 = (J2L29 & (K1_q[7] # K1_q[6] # J2L25) # !J2L29 & K1_q[7] & (K1_q[6] # J2L25)) & CASCADE(D1L80);

--D1L81 is any_odd:U5|LessThan~2378
--operation mode is normal

D1L81 = (J2L29 & (K1_q[7] # K1_q[6] # J2L25) # !J2L29 & K1_q[7] & (K1_q[6] # J2L25)) & CASCADE(D1L80);


--J8L7 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~101
--operation mode is normal

J8L7 = J2L9 $ (!J8L4);

--J8L9 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~129
--operation mode is normal

J8L9 = J2L9 $ (!J8L4);


--J8L8 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~104
--operation mode is normal

J8L8 = !J2L9 & (J8L4);

--J8L10 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~130
--operation mode is normal

J8L10 = !J2L9 & (J8L4);


--J8L3 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~107
--operation mode is normal

J8L3 = J2L5 $ (!J8L1);

--J8L5 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~131
--operation mode is normal

J8L5 = J2L5 $ (!J8L1);


--J8L4 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~110
--operation mode is normal

J8L4 = !J2L5 & (J8L1);

--J8L6 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~132
--operation mode is normal

J8L6 = !J2L5 & (J8L1);


--D1L32 is any_odd:U5|LessThan~2319
--operation mode is normal

D1L32 = K2_q[3] & !J2L13 & (K2_q[2] $ J2L9) # !K2_q[3] & J2L13 & (K2_q[2] $ J2L9);

--D1L82 is any_odd:U5|LessThan~2379
--operation mode is normal

D1L82 = K2_q[3] & !J2L13 & (K2_q[2] $ J2L9) # !K2_q[3] & J2L13 & (K2_q[2] $ J2L9);

--D1L83 is any_odd:U5|LessThan~2380
--operation mode is normal

D1L83 = K2_q[3] & !J2L13 & (K2_q[2] $ J2L9) # !K2_q[3] & J2L13 & (K2_q[2] $ J2L9);


--D1L41 is any_odd:U5|LessThan~2330
--operation mode is normal

D1L41 = (K2_q[1] & !K2_q[0] & !J2L1 & !J2L5 # !K2_q[1] & (!K2_q[0] & !J2L1 # !J2L5)) & CASCADE(D1L83);

--D1L84 is any_odd:U5|LessThan~2381
--operation mode is normal

D1L84 = (K2_q[1] & !K2_q[0] & !J2L1 & !J2L5 # !K2_q[1] & (!K2_q[0] & !J2L1 # !J2L5)) & CASCADE(D1L83);


--D1L33 is any_odd:U5|LessThan~2321
--operation mode is normal

D1L33 = D1L20 & (!K2_q[5] & !J2L21);

--D1L85 is any_odd:U5|LessThan~2382
--operation mode is normal

D1L85 = D1L20 & (!K2_q[5] & !J2L21);


--D1L34 is any_odd:U5|LessThan~2322
--operation mode is normal

D1L34 = !D1L33 & (K2_q[4] # J2L17 # !D1L21);

--D1L86 is any_odd:U5|LessThan~2383
--operation mode is normal

D1L86 = !D1L33 & (K2_q[4] # J2L17 # !D1L21);

--D1L87 is any_odd:U5|LessThan~2384
--operation mode is normal

D1L87 = !D1L33 & (K2_q[4] # J2L17 # !D1L21);


--D1L42 is any_odd:U5|LessThan~2331
--operation mode is normal

D1L42 = (J2L29 & (K2_q[7] # K2_q[6] # J2L25) # !J2L29 & K2_q[7] & (K2_q[6] # J2L25)) & CASCADE(D1L87);

--D1L88 is any_odd:U5|LessThan~2385
--operation mode is normal

D1L88 = (J2L29 & (K2_q[7] # K2_q[6] # J2L25) # !J2L29 & K2_q[7] & (K2_q[6] # J2L25)) & CASCADE(D1L87);


--J2L1 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~152
--operation mode is normal

J2L1 = input[0];

--J2L3 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~178
--operation mode is normal

J2L3 = input[0];


--J2L2 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~154
--operation mode is normal

J2L2 = input[0];

--J2L4 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~179
--operation mode is normal

J2L4 = input[0];


--J2L5 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~157
--operation mode is normal

J2L5 = input[1] $ (J2L2);

--J2L7 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~180
--operation mode is normal

J2L7 = input[1] $ (J2L2);


--J2L6 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~160
--operation mode is normal

J2L6 = input[1] # J2L2;

--J2L8 is any_odd:U5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~181
--operation mode is normal

J2L8 = input[1] # J2L2;


--J8L1 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~116
--operation mode is normal

J8L1 = !J2L30 & !J2L1;

--J8L2 is any_odd:U5|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~133
--operation mode is normal

J8L2 = !J2L30 & !J2L1;


--input[0] is input[0]
--operation mode is input

input[0] = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--input[1] is input[1]
--operation mode is input

input[1] = INPUT();


--input[2] is input[2]
--operation mode is input

input[2] = INPUT();


--input[4] is input[4]
--operation mode is input

input[4] = INPUT();


--input[5] is input[5]
--operation mode is input

input[5] = INPUT();


--input[3] is input[3]
--operation mode is input

input[3] = INPUT();


--input[6] is input[6]
--operation mode is input

input[6] = INPUT();


--input[7] is input[7]
--operation mode is input

input[7] = INPUT();


--clk_out is clk_out
--operation mode is output

clk_out = OUTPUT(A1L4);


--clk_com is clk_com
--operation mode is output

clk_com = OUTPUT(clk);


--led1[0] is led1[0]
--operation mode is output

led1[0] = OUTPUT(B1L1);


--led1[1] is led1[1]
--operation mode is output

led1[1] = OUTPUT(B1L3);


--led1[2] is led1[2]
--operation mode is output

led1[2] = OUTPUT(!B1L5);


--led1[3] is led1[3]
--operation mode is output

led1[3] = OUTPUT(!B1L7);


--led1[4] is led1[4]
--operation mode is output

led1[4] = OUTPUT(!B1L9);


--led1[5] is led1[5]
--operation mode is output

led1[5] = OUTPUT(!B1L11);


--led1[6] is led1[6]
--operation mode is output

led1[6] = OUTPUT(B1L13);


--led2[0] is led2[0]
--operation mode is output

led2[0] = OUTPUT(B2L1);


--led2[1] is led2[1]
--operation mode is output

led2[1] = OUTPUT(B2L3);


--led2[2] is led2[2]
--operation mode is output

led2[2] = OUTPUT(!B2L5);


--led2[3] is led2[3]
--operation mode is output

led2[3] = OUTPUT(!B2L7);


--led2[4] is led2[4]
--operation mode is output

led2[4] = OUTPUT(!B2L9);


--led2[5] is led2[5]
--operation mode is output

led2[5] = OUTPUT(!B2L11);


--led2[6] is led2[6]
--operation mode is output

led2[6] = OUTPUT(B2L13);


--led3[0] is led3[0]
--operation mode is output

led3[0] = OUTPUT(!B3L1);


--led3[1] is led3[1]
--operation mode is output

led3[1] = OUTPUT(VCC);


--led3[2] is led3[2]
--operation mode is output

led3[2] = OUTPUT(!B3L3);


--led3[3] is led3[3]
--operation mode is output

led3[3] = OUTPUT(!B3L1);


--led3[4] is led3[4]
--operation mode is output

led3[4] = OUTPUT(!input[6]);


--led3[5] is led3[5]
--operation mode is output

led3[5] = OUTPUT(!B3L5);


--led3[6] is led3[6]
--operation mode is output

led3[6] = OUTPUT(input[7]);


--A1L44 is rtl~61
--operation mode is normal

A1L44 = !A1L43;


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