shift_clk.eqn

vhdl编写的一个完整工程

--C1__locked is shift_pll:inst|altpll:altpll_component|_locked at PLL_X27_Y31_N0
C1__locked = PLL.LOCKED(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(inclk0), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());

--C1__clk0 is shift_pll:inst|altpll:altpll_component|_clk0 at PLL_X27_Y31_N0
C1__clk0 = PLL.CLK0(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(inclk0), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());

--C1__clk1 is shift_pll:inst|altpll:altpll_component|_clk1 at PLL_X27_Y31_N0
C1__clk1 = PLL.CLK1(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(inclk0), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());

--C1__clk2 is shift_pll:inst|altpll:altpll_component|_clk2 at PLL_X27_Y31_N0
C1__clk2 = PLL.CLK2(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(inclk0), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());


--inst2 is inst2 at LC_X1_Y9_N2
--operation mode is normal

inst2_lut_out = !inst2;
inst2 = DFFEA(inst2_lut_out, GLOBAL(C1__clk0), , , , );


--inst4 is inst4 at LC_X1_Y4_N2
--operation mode is normal

inst4_lut_out = !inst4;
inst4 = DFFEA(inst4_lut_out, GLOBAL(C1__clk1), , , , );


--inst5 is inst5 at LC_X17_Y30_N2
--operation mode is normal

inst5_lut_out = !inst5;
inst5 = DFFEA(inst5_lut_out, GLOBAL(C1__clk2), , , , );


--inclk0 is inclk0 at Pin_K17
--operation mode is input

inclk0 = INPUT();


--locked is locked at Pin_L13
--operation mode is output

locked = OUTPUT(C1__locked);


--tff0 is tff0 at Pin_V27
--operation mode is output

tff0 = OUTPUT(inst2);


--tff1 is tff1 at Pin_Y26
--operation mode is output

tff1 = OUTPUT(inst4);


--tff2 is tff2 at Pin_B18
--operation mode is output

tff2 = OUTPUT(inst5);