uart.smp_dump.txt

quatus II 环境下vhdl实现RS232功能

State Machine - |uart_test|uart:inst|uart_transmitter:inst1|state
Name state.tdata state.synch state.idle 
state.idle 0 0 0 
state.synch 0 1 1 
state.tdata 1 0 1 

State Machine - |uart_test|uart:inst|uart_receiver:inst|state
Name state.recv_data state.start_detected state.idle 
state.idle 0 0 0 
state.start_detected 0 1 1 
state.recv_data 1 0 1