des_floor_top.v

用verilog写的电梯控制器

`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:    15:30:43 01/06/07
// Design Name:    
// Module Name:    des_floor_top
// Project Name:   
// Target Device:  
// Tool versions:  
// Description:
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////
module des_floor_top(des_flo_cu,des_flo_user,address_cu,set_cu,address_user,
                     address_ok,DESLE,clk,reset);
output [15:0] des_flo_cu,des_flo_user;
input [3:0] address_cu,address_user;
input set_cu,address_ok,DESLE,clk,reset;

des_floor des_floor_cu (.des_flo_out(des_flo_cu),.address(address_cu),.set(set_cu),.reset(reset),.reset_f(DESLE),.clk(clk));
des_floor des_floor_user(.des_flo_out(des_flo_user),.address(address_user),.set(~address_ok),.reset(reset),.reset_f(DESLE),.clk(clk));
endmodule