sl1_basic_op.h

定点除法器程序

 *  \return variable(INT32) 
 *  \note extrb L_var1, pos, width
 */
#define _sl1_extract(L_var1, pos, width) \
  SL1_extract(L_var1, pos, width)


/*! \def _sl1_extractu(U_var1, pos, width)
 *  \brief a macro that unsigned extract bits from source GPR to destination GPR <br>
           rd = zero_ext(GPR[L_var1][pos:pos-width+1])
 *  \param U_var1 source variable(UINT32)
 *  \param pos unsigned immediate
 *  \param width unsigned immediate
 *  \return variable(UINT32)
 *  \note extrbu U_var1, pos, width
 */
#define _sl1_extractu(U_var1, pos, width) \
  SL1_extract_unsigned(U_var1, pos, width)


/*! \def _sl1_l_bitr(L_var1, uimm5, mode)
 *  \brief a macro that To bit operation to a bit of GPR
 *  \param L_var1 source variable(INT32)
 *  \param uimm5 unsigned 5 bit immediate
 *  \param mode see BitMode
 *  \return variable(INT32)
 *  \note c3.bitr rd, rs1 imm5, mode
 */
#define _sl1_l_bitr(L_var1, uimm5, mode) \
  SL1_L_bitr(L_var1, uimm5, mode)


/*! \def _sl1_l_bitr(L_var1, uimm5)
 *  \brief a macro that do a reverse bits operation of a GPR
 *  \param L_var1 source variable(INT32)
 *  \param uimm5 unsigned 5 bit immediate
 *  \return variable(INT32)
 *  \note c3.revb rd, rs1, imm5
 */
#define _sl1_l_revb(L_var1, uimm5) \
  SL1_L_revb(L_var1, uimm5)


/*! \def _sl1_l_dshl_v_i(L_var1, uimm5_hi, uimm5_lo)
 *  \brief a macro that do a 16bits dual shift left   
 *  \param L_var1 source variable to be shift left
 *  \param uimm5_hi shift high 16 bit of L_var1 left by uimm5_hi
 *  \param uimm5_lo shift low 16 bit of L_var1 left by uimm5_lo
 *  \return variable(INT32)
 *  \note c3.dshll.i rd, L_var1, imm5_hi, imm5_lo
 */
#define _sl1_l_dshl_v_i(L_var1, uimm5_hi, uimm5_lo) \
  SL1_dshl_i(L_var1, uimm5_hi, uimm5_lo)


/*! \def _sl1_l_dshr_v_i(L_var1, uimm5_hi, uimm5_lo)
 *  \brief a macro that do a 16bits dual shift right
 *  \param L_var1 source variable to be shift right
 *  \param uimm5_hi shift high 16 bit of L_var1 right by uimm5_hi
 *  \param uimm5_lo shift low 16 bit of L_var1 right by uimm5_lo
 *  \return variable(INT32)
 *  \note c3.dshrl.i rd, L_var1, imm5_hi, imm5_lo
 */
#define _sl1_l_dshr_v_i(L_var1, uimm5_hi, uimm5_lo) \
  SL1_dshr_i(L_var1, uimm5_hi, uimm5_lo)


/*! \def  _sl1_l_mac_v_i(L_acc, var1, imm10, acc_mode)
 *  \brief a macro that do multiply an immediate and add to accumulator
 *  \param L_acc variable(INT32), prefer to acquire acc register
 *  \param var1 variable(INT16)
 *  \param imm10 signed 10 bit immediate integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note if L_acc acquired an acc register <br>
            c3.mac.i L_acc, acm, rs1, imm10 <br>
          else <br>
            c3.mvts acc, L_acc, 0  <br>
            c3.mac.i acc, acm, rs1, imm10 <br>
            c3.mvfs L_acc, acc, 0  <br>
 */
#define _sl1_l_mac_v_i(L_acc, var1, imm10, acc_mode) \
  SL1_L_maci(L_acc, acc_mode, var1, imm10)


/*! \def _sl1_l_macn_v_i(L_acc, var1, imm10, acc_mode) 
 *  \brief a macro that do multiply an immediate and sub by accumulator 
 *  \param L_acc variable(INT32), prefer to acquire acc register
 *  \param var1 variable(INT16)
 *  \param imm10 signed 10 bit immediate integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note if L_acc acquired an acc register <br>
            c3.macn.i L_acc, acm, rs1, imm10 <br>
          else <br>
            c3.mvts acc, L_acc, 0  <br>
            c3.macn.i acc, acm, rs1, imm10 <br>
            c3.mvfs L_acc, acc, 0  <br>
 */
#define _sl1_l_macn_v_i(L_acc, var1, imm10, acc_mode) \
  SL1_L_macni(sum, var1, imm10, acc_mode)


/*! \def _sl1_l_mult_shr_v_i(var1, imm10, acc_mode, shr) 
 *  \brief a macro that do multiply an immediate with different mode and shift right
 *  \param var1 variable(INT16)
 *  \param imm10 signed 10 bit immediate integer
 *  \param acc_mode see ACC_MODE
 *  \param shr shift the multiply result right by shr
 *  \return variable(INT32)
 *  \note   c3.mvts acc, 0, 0  <br>
            c3.mula.i acc, var1, imm10, mode <br>
            c3.mvfs L_acc, acc, shr <br>
 */
#define _sl1_l_mult_shr_v_i(var1, imm10, acc_mode, shr) \
  SL1_L_mula_shr_i(0, var1, imm10, acc_mode, shr)


/*! \def  _sl1_l_mult_i_v (L_acc, var1, imm10, acc_mode)
 *  \brief a macro that do multiply an immediate with different mode 
 *  \param L_acc variable acquired acc register before
 *  \param var1 variable(INT16)
 *  \param imm10 signed 10 bit immediate integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note if L_acc acquired an acc register <br>
    	    c3.mula.i  L_acc, var1,  imm10, mode <br>
          else <br>
            c3.mvts acc, L_acc, 0  <br>
            c3.mula.i acc, var1, imm10, mode <br>
            c3.mvfs L_acc, acc, 0 <br>
 */
#define _sl1_l_mult_i_v (L_acc, var1, imm10, acc_mode) \
  SL1_L_mula_shr_i(L_acc, var1, imm10, acc_mode, 0)

/*! \def _sl1_l_saadd_p(L_p1, am1, L_p2, am2)
 *  \brief a macro that add signed 32 bits integers loaded from address registers with saturation arithmetic
 *  \param L_p1 (INT32 *) 
 *  \param am1 address register mode of L_p1, see AR_MODE
 *  \param L_p2 (INT32 *)
 *  \param am2 address register mode of L_p2, see AR_MODE
 *  \return variable(INT32)
 *  \note if L_p1 and L_p2 acquired address registers <br> 
            c3.saadd.a rd, as1, am1, as2, am2, bsel <br>
          else <br>
            c3.mvts ar1, L_p1, 0 <br>
            c3.mvts ar2, L_p2, 0 <br>
            c3.saadd.a rd, ar1, am1, ar2, am2, bsel <br>
            c3.mvfs L_p1, ar1, 0
            c3.mvfs L_p2, ar2, 0
 */
#define _sl1_l_saadd_p(L_p1, am1, L_p2, am2) \
  SL1_L_saadd_p(L_p1, am2, L_p2, am2, 0)

/*! \def _sl1_l_sasub_p(L_p1, ar1_mode, L_p2, ar2_mode)
 *  \brief a macro that substract two signed 32 bits integers loaded from address registers with saturation arithmetic
 *  \param L_p1 (INT32 *)
 *  \param ar1_mode address register mode of L_p1, see AR_MODE
 *  \param L_p2 (INT32 *)
 *  \param ar2_mode address register mode of L_p2, see AR_MODE
 *  \return variable(INT32)
 *  \note if L_p1 and L_p2 acquired address registers <br>
            c3.sasub.a rd, as1, am1, as2, am2, bsel <br>
          else <br>
            c3.mvts ar1, L_p1, 0 <br>
            c3.mvts ar2, L_p2, 0 <br>
            c3.sasub.a rd, ar1, am1, ar2, am2, bsel <br>
            c3.mvfs L_p1, ar1, 0
            c3.mvfs L_p2, ar2, 0
 */
#define _sl1_l_sasub_p(L_p1, ar1_mode, L_p2, ar2_mode) \
  SL1_L_sasub_p(L_p1, ar1_mode, L_p2, ar2_mode, 0)


/*! \def  _sl1_l_shl_add(L_acc, var1, imm4, acc_mode)
 *  \brief a macro that shift var1 by imm4 and add the result to an accumulator
 *  \param L_acc variable prefer to acquire an acc register
 *  \param var1 variable(INT16)
 *  \param imm4 unsigned 4 bit integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note if L_acc acquired an acc register <br>
            c3.saddha L_acc, acm, rs1, imm4, 1 <br>
          else <br>
            c3.mvts acc, L_acc, 0 <br>
            c3.saddha acc, acm, rs1, imm4, 1 <br> 
            c3.mvfs L_acc, acc, 0 <br>
 */
#define _sl1_l_shl_add(L_acc, var1, imm4, acc_mode) \
  SL1_L_shl_add(L_acc, acc_mode, var1, imm4, 0)


/*! \def  _sl1_l_shl_sub(L_acc, var1, imm4, acc_mode)
 *  \brief a macro that shift var1 by imm4 and sub to an accumulator
 *  \param L_acc variable prefer to acquire an acc register
 *  \param var1 variable(INT16)
 *  \param imm4 unsigned 4 bit integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note see _sl1_l_shl_add
 */
#define _sl1_l_shl_sub(L_acc, var1, imm4, acc_mode) \
  SL1_L_shl_add(L_acc, acc_mode, var1, imm4, 1)


/*! \def  _sl1_l_shl_add_p(L_acc, p1, am1, imm4, acc_mode)  
 *  \brief a macro that shift the value loaded from p1 by imm4 and add the result to an accumulator
 *  \param L_acc variable prefer to acquire an acc register
 *  \param p1 variable prefer to acquire an address register
 *  \param am1 see AR_MODE
 *  \param imm4 unsigned 4 bit integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note if L_acc acquired an acc register <br> 
            c3.saddha.a L_acc, acm, as1, am1, imm4, 0, bsel <br>
          else <br>
            c3.mvts acc, L_acc, 0
            c3.saddha.a acc, acm, as1, am1, imm4, 0, bsel <br>
            c3.mvfs L_acc, acc, 0
 */
#define _sl1_l_shl_add_p(L_acc, p1, am1, imm4, acc_mode) \
  SL1_L_shl_add_p(L_acc, acc_mode, p1, am1, imm4, 0, 0)


/*! \def  _sl1_l_shl_sub_p(L_acc, p1, am1, imm4, acc_mode)
 *  \brief a macro that shift the value loaded from p1 by imm4 and sub to an accumulator
 *  \param L_acc variable prefer to acquire an acc register
 *  \param p1 variable prefer to acquire an address register
 *  \param am1 see AR_MODE
 *  \param imm4 unsigned 4 bit integer
 *  \param acc_mode see ACC_MODE
 *  \return variable(INT32)
 *  \note see _sl1_l_shl_add_p
 */
#define _sl1_l_shl_sub_p(L_acc, p1, am1, imm4, acc_mode) \
  SL1_L_shl_add_p(L_acc, acc_mode, p1, am1, imm4, 1, 0)


#ifdef _INLINE
/*! \fn INT16 _sl1_extract_hi (INT32 L_var1)
 *  \brief a function that extract high 16 bit of L_var1
 *  \param L_var1 a INT32 variable
 *  \return high 16 bit of L_var1 
 */
_STATIC _INLINE INT16 _sl1_extract_hi (INT32  L_var1)
{
  Is_True(MIN_32 <= L_var1 <= MAX_32, ("var1 is out of range"));

  INT16  var_out = (INT16 ) (L_var1 >> 16);
  return (var_out);
}


/*! \fn INT16 _sl1_extract_lo (INT32 L_var1)
 *  \brief a function that extract low 16 bit of L_var1
 *  \param L_var1 a INT32 variable
 *  \return low 16 bit of L_var1
 */
_STATIC _INLINE INT16  _sl1_extract_lo (INT32  L_var1)
{
  Is_True(MIN_32 <= L_var1 <= MAX_32, ("L_var1 is out of range"));

  return (INT16)L_var1;
}


/*! \fn INT16 _sl1_sadd (INT16 var1, INT16 var2)
 *  \brief a function that add two 16 bit variable, and produce a saturated 16 bit result
 *  \param var1 a INT16 variable
 *  \param var2 a INT16 variable
 *  \return saturated INT16 result
 */
_STATIC _INLINE INT16  _sl1_sadd (INT16  var1, INT16  var2) 
{
  Is_True(MIN_16 <= var1 <= MAX_16, ("var1 is out of range"));	
  Is_True(MIN_16 <= var2 <= MAX_16, ("var2 is out of range"));
  INT16  var_out;

#ifdef NO_TARG_SL
  INT32  L_temp;
  L_temp = (INT32 ) var1 + var2;
  L_temp  = ((L_temp > MAX_16) ? MAX_16 : L_temp);
  var_out = ((L_temp < MIN_16) ? MIN_16 : L_temp);  
#else  
  var_out = _sl1_sadd_shl(var1,var2, 0);
#endif 
  return var_out;
}


/*! \fn INT16  _sl1_ssub (INT16  var1, INT16  var2)
 *  \brief a function that subtract var2 from var1, and produce a saturated 16 bit result
 *  \param var1 a INT16 variable
 *  \param var2 a INT16 variable
 *  \return saturated INT16 result
 */
_STATIC _INLINE INT16  _sl1_ssub (INT16  var1, INT16  var2)
{
  Is_True(MIN_16 <= var1 <= MAX_16, ("var1 is out of range"));
  Is_True(MIN_16 <= var2 <= MAX_16, ("var2 is out of range"));
  INT16  var_out;

#ifdef NO_TARG_SL
  INT32  L_diff;
  L_diff = (INT32 ) var1 - var2;
  L_diff = ((L_diff > MAX_16) ? MAX_16: L_diff);
  var_out = ((L_diff < MIN_16) ? MIN_16: L_diff);
#else
  var_out = _sl1_ssub_shl(var1,var2, 0);
#endif
  return var_out;
}


/*! \fn INT16 _sl1_sabs (INT16  var1) 
 *  \brief a function that create a saturated 16 bit absolute value
 *  \param var1 a INT16 variable
 *  \return a saturated INT16 absolute value 
 */
_STATIC _INLINE INT16 _sl1_sabs (INT16 var1)
{

  Is_True(MIN_16 <= var1 <= MAX_16, ("var1 is out of range"));

  INT16  var_out = (var1 > 0) ?  var1 : (-var1);
  var_out = (var_out < 0) ? MAX_16 : var_out;
  return(var_out);
}        


/*! \fn INT16 _sl1_snegate (INT16 var1)
 *  \brief a function that negate the 16 bit variable, and saturate the result in the case of "var1==MIN_16"
 *  \param var1 a INT16 variable
 *  \return a saturated INT16 negative value
 */
_STATIC _INLINE INT16  _sl1_snegate (INT16  var1)
{
  Is_True(MIN_16 <= var1 <= MAX_16, ("var1 is out of range"));

  INT16  var_out;
  var_out = (var1 == MIN_16) ? MAX_16 : (-var1);
  return(var_out);
}


/*! \fn INT16 _sl1_sshl(INT16  var1, INT16  var2)
 *  \brief a function that shift var1 left by var2