gewei.fit.qmsg

自己用VHDL写的键盘程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 23 12:18:50 2008 " "Info: Processing started: Wed Apr 23 12:18:50 2008" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off gewei -c gewei " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off gewei -c gewei" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "gewei EP2C35F672C8 " "Info: Selected device EP2C35F672C8 for design \"gewei\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F672C8 " "Info: Device EP2C50F672C8 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C70F672C8 " "Info: Device EP2C70F672C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "17 17 " "Info: No exact pin location assignment(s) for 17 pins of 17 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key_down " "Info: Pin key_down not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 40 544 720 56 "key_down" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key_down" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key_down } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key_down } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key_word\[3\] " "Info: Pin key_word\[3\] not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 304 504 680 320 "key_word\[3..0\]" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key_word\[3\]" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key_word[3] } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key_word[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key_word\[2\] " "Info: Pin key_word\[2\] not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 304 504 680 320 "key_word\[3..0\]" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key_word\[2\]" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key_word[2] } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key_word[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key_word\[1\] " "Info: Pin key_word\[1\] not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 304 504 680 320 "key_word\[3..0\]" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key_word\[1\]" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key_word[1] } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key_word[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key_word\[0\] " "Info: Pin key_word\[0\] not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 304 504 680 320 "key_word\[3..0\]" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key_word\[0\]" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key_word[0] } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key_word[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key0 " "Info: Pin key0 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 176 -24 144 192 "key0" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key0" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key0 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key0 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key7 " "Info: Pin key7 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 288 -24 144 304 "key7" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key7" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key7 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key7 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key8 " "Info: Pin key8 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 304 -24 144 320 "key8" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key8" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key8 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key8 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key9 " "Info: Pin key9 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 320 -24 144 336 "key9" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key9" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key9 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key9 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key4 " "Info: Pin key4 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 240 -24 144 256 "key4" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key4" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key4 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key4 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key2 " "Info: Pin key2 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 208 -24 144 224 "key2" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key2" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key2 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key3 " "Info: Pin key3 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 224 -24 144 240 "key3" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key3" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key3 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key3 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key5 " "Info: Pin key5 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 256 -24 144 272 "key5" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key5" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key5 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key5 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key1 " "Info: Pin key1 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 192 -24 144 208 "key1" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key1" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key1 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "key6 " "Info: Pin key6 not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 272 -24 144 288 "key6" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key6" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { key6 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { key6 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "d " "Info: Pin d not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { 128 -24 144 144 "d" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "d" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { d } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { d } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk " "Info: Pin clk not assigned to an exact location on the device" {  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { -8 -24 144 8 "clk" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { clk } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { clk } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk (placed in PIN P2 (CLK2, LVDSCLK1p, Input)) " "Info: Automatically promoted node clk (placed in PIN P2 (CLK2, LVDSCLK1p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G3 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3" {  } {  } 0}  } { { "gewei.bdf" "" { Schematic "E:/vhdl_exe/fpga论文/gewei/gewei.bdf" { { -8 -24 144 8 "clk" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { clk } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { clk } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "divider:inst4\|key_clock  " "Info: Automatically promoted node divider:inst4\|key_clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0}  } { { "divider.vhd" "" { Text "E:/vhdl_exe/fpga论文/gewei/divider.vhd" 6 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "divider:inst4\|key_clock" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { divider:inst4|key_clock } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { divider:inst4|key_clock } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "geweidecord:inst19\|bt  " "Info: Automatically promoted node geweidecord:inst19\|bt " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "geweizd:inst2\|key_down~9 " "Info: Destination node geweizd:inst2\|key_down~9" {  } { { "geweizd.vhd" "" { Text "E:/vhdl_exe/fpga论文/gewei/geweizd.vhd" 6 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "geweizd:inst2\|key_down~9" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { geweizd:inst2|key_down~9 } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { geweizd:inst2|key_down~9 } "NODE_NAME" } }  } 0}  } {  } 0}  } { { "geweidecord.vhd" "" { Text "E:/vhdl_exe/fpga论文/gewei/geweidecord.vhd" 14 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "geweidecord:inst19\|bt" } } } } { "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" "" { Report "E:/vhdl_exe/fpga论文/gewei/db/gewei_cmp.qrpt" Compiler "gewei" "UNKNOWN" "V1" "E:/vhdl_exe/fpga论文/gewei/db/gewei.quartus_db" { Floorplan "E:/vhdl_exe/fpga论文/gewei/" "" "" { geweidecord:inst19|bt } "NODE_NAME" } "" } } { "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" { Floorplan "E:/vhdl_exe/fpga论文/gewei/gewei.fld" "" "" { geweidecord:inst19|bt } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}