sinout.qsf

基于MATLAB/DSP Ｂuild可控信号发生器

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		Sinout_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name TOP_LEVEL_ENTITY Sinout
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:46:51  MARCH 24, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name VHDL_FILE "C:/altera/DSPBuilder/Altlib/DSPBUILDERPACK.VHD"
set_global_assignment -name VHDL_FILE "C:/altera/DSPBuilder/Altlib/DSPBUILDER.VHD"
set_global_assignment -name VHDL_FILE "D:/simulink/Sinout.vhd"
set_global_assignment -name USER_LIBRARIES "C:/altera/DSPBuilder/MegaCoreLib"
set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name VECTOR_INPUT_SOURCE Sinout.vec
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT ON
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_FILE atom_netlists/Sinout.vqm
set_location_assignment PIN_28 -to clock
set_location_assignment PIN_240 -to iSinctrls
set_location_assignment PIN_239 -to sclrp
set_location_assignment PIN_21 -to oSinOuts[0]
set_location_assignment PIN_41 -to oSinOuts[1]
set_location_assignment PIN_132 -to oSinOuts[3]
set_location_assignment PIN_133 -to oSinOuts[4]
set_location_assignment PIN_134 -to oSinOuts[5]
set_location_assignment PIN_135 -to oSinOuts[6]
set_location_assignment PIN_136 -to oSinOuts[7]
set_location_assignment PIN_128 -to oSinOuts[2]