📄 sinout.map.rpt
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; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; M4Ks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ;
+---------------------------------------------+-------------+--------------+-------------+------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------------------------------------------------------------------------------------------+
; |Sinout ; 54 (14) ; 14 ; 0 ; 0 ; 11 ; 0 ; 40 (14) ; 0 (0) ; 14 (0) ; 14 (0) ; 0 (0) ; |Sinout ;
; |AltiMult:Product1i| ; 9 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (0) ; 0 (0) ; 0 (0) ; 8 (0) ; 0 (0) ; |Sinout|AltiMult:Product1i ;
; |lpm_mult:Mult0| ; 9 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (0) ; 0 (0) ; 0 (0) ; 8 (0) ; 0 (0) ; |Sinout|AltiMult:Product1i|lpm_mult:Mult0 ;
; |multcore:mult_core| ; 9 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (1) ; 0 (0) ; 0 (0) ; 8 (0) ; 0 (0) ; |Sinout|AltiMult:Product1i|lpm_mult:Mult0|multcore:mult_core ;
; |lpm_add_sub:adder| ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (0) ; 0 (0) ; 0 (0) ; 8 (0) ; 0 (0) ; |Sinout|AltiMult:Product1i|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder ;
; |addcore:adder| ; 8 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (0) ; 0 (0) ; 0 (0) ; 8 (0) ; 0 (0) ; |Sinout|AltiMult:Product1i|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder ;
; |a_csnbuffer:result_node| ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 0 (0) ; 0 (0) ; 8 (8) ; 0 (0) ; |Sinout|AltiMult:Product1i|lpm_mult:Mult0|multcore:mult_core|lpm_add_sub:adder|addcore:adder|a_csnbuffer:result_node ;
; |IncDec:IncCounti| ; 6 (6) ; 6 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 6 (6) ; 6 (6) ; 0 (0) ; |Sinout|IncDec:IncCounti ;
; |SDelay:Delayi| ; 25 (25) ; 8 ; 0 ; 0 ; 0 ; 0 ; 17 (17) ; 0 (0) ; 8 (8) ; 0 (0) ; 0 (0) ; |Sinout|SDelay:Delayi ;
+---------------------------------------------+-------------+--------------+-------------+------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 14 ;
; Number of registers using Synchronous Clear ; 6 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+------------------------------------------------+
; Source assignments for SDelay:Delayi ;
+----------------+-------+------+----------------+
; Assignment ; Value ; From ; To ;
+----------------+-------+------+----------------+
; POWER_UP_LEVEL ; Low ; - ; result[0]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[1]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[2]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[3]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[4]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[5]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[6]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[7]~reg0 ;
; POWER_UP_LEVEL ; Low ; - ; result[8]~reg0 ;
+----------------+-------+------+----------------+
+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: SBF:SinOuti ;
+----------------+---------------+-------------------------+
; Parameter Name ; Value ; Type ;
+----------------+---------------+-------------------------+
; width_inl ; 10 ; Integer ;
; width_inr ; 0 ; Integer ;
; width_outl ; 8 ; Integer ;
; width_outr ; 0 ; Integer ;
; round ; 0 ; Integer ;
; satur ; 0 ; Integer ;
; lpm_signed ; BusIsUnsigned ; Enumerated ;
+----------------+---------------+-------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------+
; Parameter Settings for User Entity Instance: SDelay:Delayi ;
+----------------+-------+-----------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------+
; lpm_width ; 9 ; Integer ;
; lpm_delay ; 1 ; Integer ;
; sequencelength ; 1 ; Integer ;
; sequencevalue ; 1 ; Integer ;
+----------------+-------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------+
; Parameter Settings for User Entity Instance: IncDec:IncCounti ;
+----------------+--------+-------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+--------+-------------------------------------+
; lpm_width ; 6 ; Integer ;
; cst_val ; 000000 ; Binary ;
; direction ; 0 ; Integer ;
; lpm ; 0 ; Integer ;
; sequencelength ; 1 ; Integer ;
; sequencevalue ; 1 ; Integer ;
; isunsigned ; 1 ; Integer ;
+----------------+--------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AltiMult:Product1i ;
+----------------+--------+---------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+--------+---------------------------------------+
; lpm_widtha ; 9 ; Integer ;
; lpm_widthb ; 1 ; Integer ;
; lpm_widthr ; 10 ; Integer ;
; lpm_hint ; UNUSED ; String ;
; cst_val ; 0 ; Binary ;
; one_input ; 0 ; Integer ;
; pipeline ; 0 ; Integer ;
; sequencelength ; 1 ; Integer ;
; sequencevalue ; 1 ; Integer ;
; lpm ; 0 ; Integer ;
+----------------+--------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: AltiMult:Product1i|lpm_mult:Mult0 ;
+------------------------------------------------+---------+-------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------------------+---------+-------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTHA ; 8 ; Untyped ;
; LPM_WIDTHB ; 1 ; Untyped ;
; LPM_WIDTHP ; 9 ; Untyped ;
; LPM_WIDTHR ; 9 ; Untyped ;
; LPM_WIDTHS ; 1 ; Untyped ;
; LPM_REPRESENTATION ; SIGNED ; Untyped ;
; LPM_PIPELINE ; 0 ; Untyped ;
; LATENCY ; 0 ; Untyped ;
; INPUT_A_IS_CONSTANT ; NO ; Untyped ;
; INPUT_B_IS_CONSTANT ; NO ; Untyped ;
; USE_EAB ; OFF ; Untyped ;
; MAXIMIZE_SPEED ; 5 ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; APEX20K_TECHNOLOGY_MAPPER ; LUT ; TECH_MAPPER_APEX20K ;
; DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ; Untyped ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0 ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
; INPUT_A_FIXED_VALUE ; Bx ; Untyped ;
; INPUT_B_FIXED_VALUE ; Bx ; Untyped ;
+------------------------------------------------+---------+-------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance ;
+---------------------------------------+-----------------------------------+
; Name ; Value ;
+---------------------------------------+-----------------------------------+
; Number of entity instances ; 1 ;
; Entity Instance ; AltiMult:Product1i|lpm_mult:Mult0 ;
; -- LPM_WIDTHA ; 8 ;
; -- LPM_WIDTHB ; 1 ;
; -- LPM_WIDTHP ; 9 ;
; -- LPM_REPRESENTATION ; SIGNED ;
; -- INPUT_A_IS_CONSTANT ; NO ;
; -- INPUT_B_IS_CONSTANT ; NO ;
; -- USE_EAB ; OFF ;
; -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO ;
; -- INPUT_A_FIXED_VALUE ; Bx ;
; -- INPUT_B_FIXED_VALUE ; Bx ;
+---------------------------------------+-----------------------------------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Mon Mar 31 10:01:17 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Sinout -c Sinout
Info: Found 2 design units, including 0 entities, in source file C:/altera/DSPBuilder/Altlib/DSPBUILDERPACK.VHD
Info: Found design unit 1: dspbuilderblock
Info: Found design unit 2: dspbuilderblock-body
Info: Found 96 design units, including 48 entities, in source file C:/altera/DSPBuilder/Altlib/DSPBUILDER.VHD
Info: Found design unit 1: AROUND-AROUND_SYNTH
Info: Found design unit 2: sRounderAltr-AROUNDPIPE_SYNTH
Info: Found design unit 3: ASAT-ASAT_SYNTH
Info: Found design unit 4: ASATPIPE-ASAT_SYNTH
Info: Found design unit 5: seq-seq_SYNTH
Info: Found design unit 6: SBF-SBF_SYNTH
Info: Found design unit 7: SRED-SRED_SYNTH
Info: Found design unit 8: Upsample-Upsample_SYNTH
Info: Found design unit 9: SDownSampleAltr-SYNTH
Info: Found design unit 10: SDelay-SDelay_SYNTH
Info: Found design unit 11: SBitLogical-SBitLogical_SYNTH
Info: Found design unit 12: SBusLogical-SSBusLogical_SYNTH
Info: Found design unit 13: AltiMult-AltMult_SYNTH
Info: Found design unit 14: SAdderSub-a_SAdderSub
Info: Found design unit 15: IncDec-IncDec_Synth
Info: Found design unit 16: comparator-comparator_synth
Info: Found design unit 17: sync_dpram_single_clock-synth_sync_dpram_single_clock
Info: Found design unit 18: SDpram-SDpram_SYNTH
Info: Found design unit 19: SLRom-SLRom_SYNTH
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