sinout.hif

基于MATLAB/DSP Ｂuild可控信号发生器

datab8
-1
1
datab7
-1
1
datab6
-1
1
datab5
-1
1
datab4
-1
1
datab3
-1
1
datab2
-1
1
datab1
-1
1
}
# include_file {
c:|altera|quartus60|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
c:|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
c:|altera|quartus60|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
c:|altera|quartus60|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
c:|altera|quartus60|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
c:|altera|quartus60|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
c:|altera|quartus60|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# end
# entity
addcore
# storage
db|Sinout.(8).cnf
db|Sinout.(8).cnf
# case_insensitive
# source_file
c:|altera|quartus60|libraries|megafunctions|addcore.tdf
a63b3f9948676dba45ce9d3335c98e4
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
9
PARAMETER_UNKNOWN
USR
REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
DIRECTION
DEFAULT
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
}
# used_port {
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
}
# include_file {
c:|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
c:|altera|quartus60|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
c:|altera|quartus60|libraries|megafunctions|a_csnbuffer.inc
49de46f6a395e2e6edecabe6eac9d873
}
# end
# entity
a_csnbuffer
# storage
db|Sinout.(9).cnf
db|Sinout.(9).cnf
# case_insensitive
# source_file
c:|altera|quartus60|libraries|megafunctions|a_csnbuffer.tdf
14fa1fe880ca66e7782a2fafd457197
6
# user_parameter {
WIDTH
9
PARAMETER_UNKNOWN
USR
NEED_CARRY
0
PARAMETER_UNKNOWN
DEF
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
}
# used_port {
sout0
-1
3
sin0
-1
3
}
# end
# entity
a_csnbuffer
# storage
db|Sinout.(10).cnf
db|Sinout.(10).cnf
# case_insensitive
# source_file
c:|altera|quartus60|libraries|megafunctions|a_csnbuffer.tdf
14fa1fe880ca66e7782a2fafd457197
6
# user_parameter {
WIDTH
9
PARAMETER_UNKNOWN
USR
NEED_CARRY
1
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
}
# used_port {
sout8
-1
3
sout7
-1
3
sout6
-1
3
sout5
-1
3
sout4
-1
3
sout3
-1
3
sout2
-1
3
sout1
-1
3
sout0
-1
3
sin8
-1
3
sin7
-1
3
sin6
-1
3
sin5
-1
3
sin4
-1
3
sin3
-1
3
sin2
-1
3
sin1
-1
3
sin0
-1
3
cout8
-1
3
cout7
-1
3
cout6
-1
3
cout5
-1
3
cout4
-1
3
cout3
-1
3
cout2
-1
3
cout1
-1
3
cout0
-1
3
cin8
-1
3
cin7
-1
3
cin6
-1
3
cin5
-1
3
cin4
-1
3
cin3
-1
3
cin2
-1
3
cin1
-1
3
cin0
-1
3
}
# end
# entity
altshift
# storage
db|Sinout.(11).cnf
db|Sinout.(11).cnf
# case_insensitive
# source_file
c:|altera|quartus60|libraries|megafunctions|altshift.tdf
eedda481b22c659bfdc3e0a628220
6
# user_parameter {
WIDTH
9
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
}
# end
# entity
altshift
# storage
db|Sinout.(12).cnf
db|Sinout.(12).cnf
# case_insensitive
# source_file
c:|altera|quartus60|libraries|megafunctions|altshift.tdf
eedda481b22c659bfdc3e0a628220
6
# user_parameter {
WIDTH
1
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
result0
-1
3
data0
-1
3
}
# end
# entity
Sinout
# storage
db|Sinout.(0).cnf
db|Sinout.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
Sinout.vhd
946521eeca248f35f4e82188989948e
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
C:|altera|DSPBuilder|Altlib|DSPBUILDERPACK.VHD
7bcf7ab984efeb9f79482ff4991ef9
}
# hierarchies {
|
}
# end
# entity
SBF
# storage
db|Sinout.(13).cnf
db|Sinout.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
C:|altera|DSPBuilder|Altlib|DSPBUILDER.VHD
c6b75a6d22efc5f832cf11f8c3352
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
width_inl
10
PARAMETER_DEC
USR
width_inr
0
PARAMETER_DEC
USR
width_outl
8
PARAMETER_DEC
USR
width_outr
0
PARAMETER_DEC
USR
round
0
PARAMETER_DEC
USR
satur
0
PARAMETER_DEC
USR
lpm_signed
BusIsUnsigned
PARAMETER_ENUM
USR
 constraint(xin)
9 downto 0
PARAMETER_STRING
USR
 constraint(yout)
7 downto 0
PARAMETER_STRING
USR
}
# include_file {
C:|altera|DSPBuilder|Altlib|DSPBUILDERPACK.VHD
7bcf7ab984efeb9f79482ff4991ef9
}
# hierarchies {
SBF:SinOuti
}
# end
# entity
SDelay
# storage
db|Sinout.(14).cnf
db|Sinout.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
C:|altera|DSPBuilder|Altlib|DSPBUILDER.VHD
c6b75a6d22efc5f832cf11f8c3352
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_width
9
PARAMETER_DEC
USR
lpm_delay
1
PARAMETER_DEC
USR
sequencelength
1
PARAMETER_DEC
USR
sequencevalue
1
PARAMETER_DEC
USR
 constraint(dataa)
8 downto 0
PARAMETER_STRING
USR
 constraint(result)
8 downto 0
PARAMETER_STRING
USR
}
# include_file {
C:|altera|DSPBuilder|Altlib|DSPBUILDERPACK.VHD
7bcf7ab984efeb9f79482ff4991ef9
}
# hierarchies {
SDelay:Delayi
}
# end
# entity
IncDec
# storage
db|Sinout.(15).cnf
db|Sinout.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
C:|altera|DSPBuilder|Altlib|DSPBUILDER.VHD
c6b75a6d22efc5f832cf11f8c3352
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_width
6
PARAMETER_DEC
USR
cst_val
000000
PARAMETER_BIN
USR
direction
0
PARAMETER_DEC
USR
lpm
0
PARAMETER_DEC
USR
sequencelength
1
PARAMETER_DEC
USR
sequencevalue
1
PARAMETER_DEC
USR
isunsigned
1
PARAMETER_DEC
USR
 constraint(result)
5 downto 0
PARAMETER_STRING
USR
}
# include_file {
C:|altera|DSPBuilder|Altlib|DSPBUILDERPACK.VHD
7bcf7ab984efeb9f79482ff4991ef9
}
# hierarchies {
IncDec:IncCounti
}
# end
# entity
AltiMult
# storage
db|Sinout.(16).cnf
db|Sinout.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
C:|altera|DSPBuilder|Altlib|DSPBUILDER.VHD
c6b75a6d22efc5f832cf11f8c3352
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
lpm_widtha
9
PARAMETER_DEC
USR
lpm_widthb
1
PARAMETER_DEC
USR
lpm_widthr
10
PARAMETER_DEC
USR
lpm_hint
UNUSED
PARAMETER_STRING
DEF
cst_val
0
PARAMETER_BIN
USR
one_input
0
PARAMETER_DEC
USR
pipeline
0
PARAMETER_DEC
USR
sequencelength
1
PARAMETER_DEC
USR
sequencevalue
1
PARAMETER_DEC
USR
lpm
0
PARAMETER_DEC
USR
 constraint(dataa)
8 downto 0
PARAMETER_STRING
USR
 constraint(datab)
0 downto 0
PARAMETER_STRING
USR
 constraint(result)
9 downto 0
PARAMETER_STRING
USR
}
# include_file {
C:|altera|DSPBuilder|Altlib|DSPBUILDERPACK.VHD
7bcf7ab984efeb9f79482ff4991ef9
}
# hierarchies {
AltiMult:Product1i
}
# end
# complete