dds.tan.rpt

利用VHDL语言实现在

; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg6 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg0 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg1 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg2 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg3 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg4 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg5 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg6 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg0 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg1 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg2 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg3 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg4 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg5 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 197.01 MHz ( period = 5.076 ns )                    ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|ram_block1a0~porta_address_reg6 ; DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_hq21:auto_generated|q_a[1]                          ; CLK        ; CLK      ; None                        ; None                      ; 4.319 ns                ;
; N/A                                     ; 219.78 MHz ( period = 4.550 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[6]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 4.330 ns                ;
; N/A                                     ; 219.78 MHz ( period = 4.550 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[7]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 4.330 ns                ;
; N/A                                     ; 219.78 MHz ( period = 4.550 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[8]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 4.330 ns                ;
; N/A                                     ; 230.68 MHz ( period = 4.335 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[5]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 4.115 ns                ;
; N/A                                     ; 235.02 MHz ( period = 4.255 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[4]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 4.035 ns                ;
; N/A                                     ; 239.52 MHz ( period = 4.175 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[3]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 3.955 ns                ;
; N/A                                     ; 244.20 MHz ( period = 4.095 ns )                    ; DDS1:u1|q[0]                                                                                                      ; DDS1:u1|q[2]                                                                                                      ; CLK        ; CLK      ; None                        ; None                      ; 3.875 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[1]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[2]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[3]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[4]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[5]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[6]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[7]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 245.16 MHz ( period = 4.079 ns )                    ; PL_DPSK2:u2|q[7]                                                                                                  ; PL_DPSK2:u2|q[8]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.818 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[1]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[2]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[3]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[4]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[5]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[6]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[7]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 254.91 MHz ( period = 3.923 ns )                    ; PL_DPSK2:u2|q[8]                                                                                                  ; PL_DPSK2:u2|q[8]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.662 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[1]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[2]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[3]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[4]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[5]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;
; N/A                                     ; 261.30 MHz ( period = 3.827 ns )                    ; PL_DPSK2:u2|q[2]                                                                                                  ; PL_DPSK2:u2|q[6]                                                                                                  ; CLK        ; CLK      ; None                        ; None                      ; 3.566 ns                ;