cyclic.fit.qmsg

来自「基于fpga的屏幕测试程序」· QMSG 代码 · 共 53 行 · 第 1/5 页

{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_START" "combinational resynthesis 1 " "Info: Starting physical synthesis algorithm combinational resynthesis 1" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_END" "combinational resynthesis 1 0 " "Info: Physical synthesis algorithm combinational resynthesis 1 complete: estimated performance improvement of up to 0 percent" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_START" "logic and register replication " "Info: Starting physical synthesis algorithm logic and register replication" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_END" "logic and register replication 0 " "Info: Physical synthesis algorithm logic and register replication complete: estimated performance improvement of up to 0 percent" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_START" "register unpacking " "Info: Starting physical synthesis algorithm register unpacking" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_ALGO_END" "register unpacking 0 " "Info: Physical synthesis algorithm register unpacking complete: estimated performance improvement of up to 0 percent" {  } {  } 0}
{ "Info" "IFSYN_PHYSICAL_SYNTHESIS_END" "00:02:46 " "Info: Physical synthesis optimizations complete: elapsed time is 00:02:46" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.783 ns register register " "Info: Estimated most critical path is register to register delay of 4.783 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns fran_pg:pattern_generator\|start_v_delay~3 1 REG LAB_X8_Y16 112 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X8_Y16; Fanout = 112; REG Node = 'fran_pg:pattern_generator\|start_v_delay~3'" {  } { { "D:/实验室/pg_070731/db/cyclic_cmp.qrpt" "" { Report "D:/实验室/pg_070731/db/cyclic_cmp.qrpt" Compiler "cyclic" "UNKNOWN" "V1" "D:/实验室/pg_070731/db/cyclic.quartus_db" { Floorplan "D:/实验室/pg_070731/" "" "" { fran_pg:pattern_generator|start_v_delay~3 } "NODE_NAME" } "" } } { "fran_pg.tdf" "" { Text "D:/实验室/pg_070731/fran_pg.tdf" 174 1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.424 ns) + CELL(0.225 ns) 3.649 ns fran_pg:pattern_generator\|pattern_dl:thepattern_dl\|counti\[8\] 2 COMB LAB_X43_Y27 5 " "Info: 2: + IC(3.424 ns) + CELL(0.225 ns) = 3.649 ns; Loc. = LAB_X43_Y27; Fanout = 5; COMB Node = 'fran_pg:pattern_generator\|pattern_dl:thepattern_dl\|counti\[8\]'" {  } { { "D:/实验室/pg_070731/db/cyclic_cmp.qrpt" "" { Report "D:/实验室/pg_070731/db/cyclic_cmp.qrpt" Compiler "cyclic" "UNKNOWN" "V1" "D:/实验室/pg_070731/db/cyclic.quartus_db" { Floorplan "D:/实验室/pg_070731/" "" "3.649 ns" { fran_pg:pattern_generator|start_v_delay~3 fran_pg:pattern_generator|pattern_dl:thepattern_dl|counti[8] } "NODE_NAME" } "" } } { "pattern_dl.vhd" "" { Text "D:/实验室/pg_070731/pattern_dl.vhd" 44 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.170 ns) + CELL(0.340 ns) 4.159 ns fran_pg:pattern_generator\|pattern_dl:thepattern_dl\|reduce