image.fit.summary

来自「FPGA的串口通信程序」· SUMMARY 代码 · 共 14 行

Flow Status : Successful - Mon Apr 21 09:41:41 2008
Quartus II Version : 5.0 Build 168 06/22/2005 SP 1 SJ Full Version
Revision Name : image
Top-level Entity Name : image
Family : Cyclone
Device : EP1C6T144C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 991 / 5,980 ( 16 % )
Total pins : 60 / 98 ( 61 % )
Total virtual pins : 0
Total memory bits : 0 / 92,160 ( 0 % )
Total PLLs : 1 / 2 ( 50 % )