image.map.eqn

FPGA的串口通信程序

J1_count[11]_lut_out = J1L24 & J1L781;
J1_count[11] = DFFEAS(J1_count[11]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[9] is image1:U2|shinningblock:U2|count[9]
--operation mode is normal

J1_count[9]_lut_out = J1L44 & J1L781;
J1_count[9] = DFFEAS(J1_count[9]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[8] is image1:U2|shinningblock:U2|count[8]
--operation mode is normal

J1_count[8]_lut_out = J1L64 & J1L781;
J1_count[8] = DFFEAS(J1_count[8]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1L791 is image1:U2|shinningblock:U2|reduce_nor~820
--operation mode is normal

J1L791 = J1_count[10] # !J1_count[8] # !J1_count[9] # !J1_count[11];


--J1L891 is image1:U2|shinningblock:U2|reduce_nor~821
--operation mode is normal

J1L891 = J1L691 # J1_count[13] # J1_count[12] # J1L791;


--J1_count[7] is image1:U2|shinningblock:U2|count[7]
--operation mode is normal

J1_count[7]_lut_out = J1L84;
J1_count[7] = DFFEAS(J1_count[7]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[5] is image1:U2|shinningblock:U2|count[5]
--operation mode is normal

J1_count[5]_lut_out = J1L05;
J1_count[5] = DFFEAS(J1_count[5]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[4] is image1:U2|shinningblock:U2|count[4]
--operation mode is normal

J1_count[4]_lut_out = J1L25;
J1_count[4] = DFFEAS(J1_count[4]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[6] is image1:U2|shinningblock:U2|count[6]
--operation mode is normal

J1_count[6]_lut_out = J1L45 & J1L781;
J1_count[6] = DFFEAS(J1_count[6]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1L991 is image1:U2|shinningblock:U2|reduce_nor~822
--operation mode is normal

J1L991 = J1_count[7] # J1_count[5] # J1_count[4] # !J1_count[6];


--J1_count[3] is image1:U2|shinningblock:U2|count[3]
--operation mode is normal

J1_count[3]_lut_out = J1L65;
J1_count[3] = DFFEAS(J1_count[3]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[2] is image1:U2|shinningblock:U2|count[2]
--operation mode is normal

J1_count[2]_lut_out = J1L85;
J1_count[2] = DFFEAS(J1_count[2]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[1] is image1:U2|shinningblock:U2|count[1]
--operation mode is normal

J1_count[1]_lut_out = J1L06;
J1_count[1] = DFFEAS(J1_count[1]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1_count[0] is image1:U2|shinningblock:U2|count[0]
--operation mode is normal

J1_count[0]_lut_out = J1L26 & J1L781;
J1_count[0] = DFFEAS(J1_count[0]_lut_out, K1__clk0, VCC, , !J1_state.tristate, , , , );


--J1L002 is image1:U2|shinningblock:U2|reduce_nor~823
--operation mode is normal

J1L002 = J1_count[3] # J1_count[2] # J1_count[1] # J1_count[0];


--J1L781 is image1:U2|shinningblock:U2|reduce_nor~0
--operation mode is normal

J1L781 = J1L591 # J1L891 # J1L991 # J1L002;


--J1_state.tristate is image1:U2|shinningblock:U2|state.tristate
--operation mode is normal

J1_state.tristate_lut_out = J1L781 & J1_state.tristate & (!J1L091 # !J1_state.state3) # !J1L781 & (!J1L091 # !J1_state.state3);
J1_state.tristate = DFFEAS(J1_state.tristate_lut_out, K1__clk0, VCC, , , , , , );


--H1_panel[6] is rs232_r:U1|rcv:u2|panel[6]
--operation mode is normal

H1_panel[6]_lut_out = H1_rbr[76];
H1_panel[6] = DFFEAS(H1_panel[6]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--H1_panel[5] is rs232_r:U1|rcv:u2|panel[5]
--operation mode is normal

H1_panel[5]_lut_out = H1_rbr[75];
H1_panel[5] = DFFEAS(H1_panel[5]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--H1_panel[4] is rs232_r:U1|rcv:u2|panel[4]
--operation mode is normal

H1_panel[4]_lut_out = H1_rbr[74];
H1_panel[4] = DFFEAS(H1_panel[4]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--H1_panel[7] is rs232_r:U1|rcv:u2|panel[7]
--operation mode is normal

H1_panel[7]_lut_out = H1_rbr[77];
H1_panel[7] = DFFEAS(H1_panel[7]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--E1L563 is amp:U4|reduce_nor~1519
--operation mode is normal

E1L563 = H1_panel[6] # H1_panel[5] # H1_panel[4] # !H1_panel[7];


--H1_panel[3] is rs232_r:U1|rcv:u2|panel[3]
--operation mode is normal

H1_panel[3]_lut_out = H1_rbr[73];
H1_panel[3] = DFFEAS(H1_panel[3]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--H1_panel[2] is rs232_r:U1|rcv:u2|panel[2]
--operation mode is normal

H1_panel[2]_lut_out = H1_rbr[72];
H1_panel[2] = DFFEAS(H1_panel[2]_lut_out, G1_c0, VCC, , !H1L66, , , , );


--L1_clkout is amp:U4|count:U1|clkout
--operation mode is normal

L1_clkout_lut_out = !L1_count[21];
L1_clkout = DFFEAS(L1_clkout_lut_out, clk, VCC, , , , , , );


--E1_amp1[0] is amp:U4|amp1[0]
--operation mode is normal

E1_amp1[0]_lut_out = E1L663 # H1_amp[5] # H1_amp[4] # !E1L224;
E1_amp1[0] = DFFEAS(E1_amp1[0]_lut_out, clk, VCC, , , , , , );


--E1_amp1[3] is amp:U4|amp1[3]
--operation mode is normal

E1_amp1[3]_lut_out = E1L224 & H1_amp[7] & H1_amp[4];
E1_amp1[3] = DFFEAS(E1_amp1[3]_lut_out, clk, VCC, , , , , , );


--E1_ctrl60_enable is amp:U4|ctrl60_enable
--operation mode is normal

E1_ctrl60_enable_lut_out = E1_ctrl # E1_ctrl60_enable & (E1L173 # E1L573);
E1_ctrl60_enable = DFFEAS(E1_ctrl60_enable_lut_out, clk, VCC, , , , , , );


--E1_ctrl59_enable is amp:U4|ctrl59_enable
--operation mode is normal

E1_ctrl59_enable_lut_out = E1_ctrl # E1_ctrl59_enable & (E1L083 # E1L483);
E1_ctrl59_enable = DFFEAS(E1_ctrl59_enable_lut_out, clk, VCC, , , , , , );


--E1_amp1[2] is amp:U4|amp1[2]
--operation mode is normal

E1_amp1[2]_lut_out = E1L224 & H1_amp[7] & H1_amp[5];
E1_amp1[2] = DFFEAS(E1_amp1[2]_lut_out, clk, VCC, , , , , , );


--E1L063 is amp:U4|pu~1269
--operation mode is normal

E1L063 = E1_amp1[3] & (E1_amp1[2] & E1_ctrl60_enable # !E1_amp1[2] & (E1_ctrl59_enable));


--E1_ctrl31_enable is amp:U4|ctrl31_enable
--operation mode is normal

E1_ctrl31_enable_lut_out = E1_ctrl # E1_ctrl31_enable & (E1L983 # E1L393);
E1_ctrl31_enable = DFFEAS(E1_ctrl31_enable_lut_out, clk, VCC, , , , , , );


--E1_ctrl58_enable is amp:U4|ctrl58_enable
--operation mode is normal

E1_ctrl58_enable_lut_out = E1_ctrl # E1_ctrl58_enable & (E1L893 # E1L204);
E1_ctrl58_enable = DFFEAS(E1_ctrl58_enable_lut_out, clk, VCC, , , , , , );


--E1_ctrl56_enable is amp:U4|ctrl56_enable
--operation mode is normal

E1_ctrl56_enable_lut_out = E1_ctrl # E1_ctrl56_enable & (E1L704 # E1L114);
E1_ctrl56_enable = DFFEAS(E1_ctrl56_enable_lut_out, clk, VCC, , , , , , );


--E1_amp1[1] is amp:U4|amp1[1]
--operation mode is normal

E1_amp1[1]_lut_out = E1L224 & H1_amp[7] & H1_amp[6];
E1_amp1[1] = DFFEAS(E1_amp1[1]_lut_out, clk, VCC, , , , , , );


--E1L163 is amp:U4|pu~1270
--operation mode is normal

E1L163 = E1_amp1[1] & E1_amp1[2] & E1_ctrl58_enable # !E1_amp1[1] & (E1_ctrl56_enable);


--E1_ctrl52_enable is amp:U4|ctrl52_enable
--operation mode is normal

E1_ctrl52_enable_lut_out = E1_ctrl # E1_ctrl52_enable & (E1L614 # E1L024);
E1_ctrl52_enable = DFFEAS(E1_ctrl52_enable_lut_out, clk, VCC, , , , , , );


--E1L263 is amp:U4|pu~1271
--operation mode is normal

E1L263 = E1_amp1[2] # E1_amp1[1] & (!E1_ctrl52_enable # !E1_ctrl31_enable);


--E1L363 is amp:U4|pu~1272
--operation mode is normal

E1L363 = E1_amp1[3] # E1L263 & (!E1_ctrl31_enable # !E1L163);


--E1L463 is amp:U4|pu~1273
--operation mode is normal

E1L463 = E1L363 & (!E1_ctrl31_enable # !E1L063);


--E1L453 is amp:U4|pd~956
--operation mode is normal

E1L453 = E1_amp1[1] & E1_ctrl52_enable & !E1_amp1[3] & !E1_amp1[2];


--E1L553 is amp:U4|pd~957
--operation mode is normal

E1L553 = !E1_amp1[3] & (E1_amp1[1] & E1_ctrl58_enable # !E1_amp1[1] & (E1_ctrl56_enable));


--E1L653 is amp:U4|pd~958
--operation mode is normal

E1L653 = E1L063 # E1L453 # E1_amp1[2] & E1L553;


--E1L753 is amp:U4|pd~959
--operation mode is normal

E1L753 = L1_clkout & E1_amp1[0] & (!E1_ctrl31_enable);


--C1_out1_r_e[0] is image1:U2|out1_r_e[0]
--operation mode is normal

C1_out1_r_e[0]_lut_out = J1_out2_r_e[0];
C1_out1_r_e[0] = DFFEAS(C1_out1_r_e[0]_lut_out, K1__clk0, VCC, , , , , , );


--H1_rgb_sel[6] is rs232_r:U1|rcv:u2|rgb_sel[6]
--operation mode is normal

H1_rgb_sel[6]_lut_out = H1_rbr[76];
H1_rgb_sel[6] = DFFEAS(H1_rgb_sel[6]_lut_out, G1_c0, VCC, , H1L76, , , , );


--H1_rgb_sel[5] is rs232_r:U1|rcv:u2|rgb_sel[5]
--operation mode is normal

H1_rgb_sel[5]_lut_out = H1_rbr[75];
H1_rgb_sel[5] = DFFEAS(H1_rgb_sel[5]_lut_out, G1_c0, VCC, , H1L76, , , , );


--H1_rgb_sel[4] is rs232_r:U1|rcv:u2|rgb_sel[4]
--operation mode is normal

H1_rgb_sel[4]_lut_out = H1_rbr[74];
H1_rgb_sel[4] = DFFEAS(H1_rgb_sel[4]_lut_out, G1_c0, VCC, , H1L76, , , , );


--H1_rgb_sel[3] is rs232_r:U1|rcv:u2|rgb_sel[3]
--operation mode is normal

H1_rgb_sel[3]_lut_out = H1_rbr[73];
H1_rgb_sel[3] = DFFEAS(H1_rgb_sel[3]_lut_out, G1_c0, VCC, , H1L76, , , , );


--H1_rgb_sel[2] is rs232_r:U1|rcv:u2|rgb_sel[2]
--operation mode is normal

H1_rgb_sel[2]_lut_out = H1_rbr[72];
H1_rgb_sel[2] = DFFEAS(H1_rgb_sel[2]_lut_out, G1_c0, VCC, , H1L76, , , , );


--H1L851 is rs232_r:U1|rcv:u2|rgb_sel[2]~156
--operation mode is normal

H1L851 = !H1_rgb_sel[5] & !H1_rgb_sel[4] & !H1_rgb_sel[3] & !H1_rgb_sel[2];


--C1_out1_r_e[1] is image1:U2|out1_r_e[1]
--operation mode is normal

C1_out1_r_e[1]_lut_out = J1_out2_r_e[1];
C1_out1_r_e[1] = DFFEAS(C1_out1_r_e[1]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[2] is image1:U2|out1_r_e[2]
--operation mode is normal

C1_out1_r_e[2]_lut_out = J1_out2_r_e[2];
C1_out1_r_e[2] = DFFEAS(C1_out1_r_e[2]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[3] is image1:U2|out1_r_e[3]
--operation mode is normal

C1_out1_r_e[3]_lut_out = J1_out2_r_e[3];
C1_out1_r_e[3] = DFFEAS(C1_out1_r_e[3]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[4] is image1:U2|out1_r_e[4]
--operation mode is normal

C1_out1_r_e[4]_lut_out = J1_out2_r_e[4];
C1_out1_r_e[4] = DFFEAS(C1_out1_r_e[4]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[5] is image1:U2|out1_r_e[5]
--operation mode is normal

C1_out1_r_e[5]_lut_out = J1_out2_r_e[5];
C1_out1_r_e[5] = DFFEAS(C1_out1_r_e[5]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[6] is image1:U2|out1_r_e[6]
--operation mode is normal

C1_out1_r_e[6]_lut_out = J1_out2_r_e[6];
C1_out1_r_e[6] = DFFEAS(C1_out1_r_e[6]_lut_out, K1__clk0, VCC, , , , , , );


--C1_out1_r_e[7] is image1:U2|out1_r_e[7]
--operation mode is normal

C1_out1_r_e[7]_lut_out = J1_out2_r_e[7];
C1_out1_r_e[7] = DFFEAS(C1_out1_r_e[7]_lut_out, K1__clk0, VCC, , , , , , );


--H1_rgb_sel[7] is rs232_r:U1|rcv:u2|rgb_sel[7]
--operation mode is normal

H1_rgb_sel[7]_lut_out = H1_rbr[77];
H1_rgb_sel[7] = DFFEAS(H1_rgb_sel[7]_lut_out, G1_c0, VCC, , H1L76, , , , );


--M1_clk1x_enable is rs232_t:u5|send:u2|clk1x_enable
--operation mode is normal

M1_clk1x_enable_lut_out = clkx # M1_clk1x_enable & (M1L2 # !M1L21);
M1_clk1x_enable = DFFEAS(M1_clk1x_enable_lut_out, clk, VCC, , , , , , );


--M1L41 is rs232_t:u5|send:u2|LessThan~87
--operation mode is normal

M1L41 = !M1_no_bits_sent[0] # !M1_no_bits_sent[1];


--M1_tsr[6] is rs232_t:u5|send:u2|tsr[6]
--operation mode is normal

M1_tsr[6]_lut_out = M1L22 & M1_tsr[5] # !M1L22 & (M1_tbr[6]);
M1_tsr[6] = DFFEAS(M1_tsr[6]_lut_out, M1_clkdiv[3], VCC, , M1L24, , , , );


--M1_tbr[7] is rs232_t:u5|send:u2|tbr[7]
--operation mode is normal

M1_tbr[7]_lut_out = F1_dataout[7];
M1_tbr[7] = DFFEAS(M1_tbr[7]_lut_out, M1_clk1x_enable, VCC, , , , , , );


--M1L24 is rs232_t:u5|send:u2|tsr[7]~582
--operation mode is normal

M1L24 = M1_no_bits_sent[3] & !M1_no_bits_sent[2] & (!M1_no_bits_sent[0] # !M1_no_bits_sent[1]) # !M1_no_bits_sent[3] & (M1_no_bits_sent[2] # M1_no_bits_sent[0]);


--G2_c0 is rs232_t:u5|pll1:u1|c0
--operation mode is normal

G2_c0_lut_out = !G2L62 & !G2L72 & (G2_number[8]);
G2_c0 = DFFEAS(G2_c0_lut_out, clk, VCC, , , , , , );


--M1_clkdiv[0] is rs232_t:u5|send:u2|clkdiv[0]
--operation mode is arithmetic

M1_clkdiv[0]_lut_out = M1_clk1x_enable $ M1_clkdiv[0];
M1_clkdiv[0] = DFFEAS(M1_clkdiv[0]_lut_out, G2_c0, VCC, , , , , M1L32, );

--M1L5 is rs232_t:u5|send:u2|clkdiv[0]~78
--operation mode is arithmetic

M1L5 = CARRY(M1_clk1x_enable & M1_clkdiv[0]);


--M1_clkdiv[1] is rs232_t:u5|send:u2|clkdiv[1]
--operation mode is arithmetic

M1_clkdiv[1]_carry_eqn = M1L5;
M1_clkdiv[1]_lut_out = M1_clkdiv[1] $ (M1_clkdiv[1]_carry_eqn);
M1_clkdiv[1] = DFFEAS(M1_clkdiv[1]_lut_out, G2_c0, VCC, , , , , M1L32, );

--M1L7 is rs232_t:u5|send:u2|clkdiv[1]~82
--operation mode is arithmetic

M1L7 = CARRY(!M1L5 # !M1_clkdiv[1]);


--M1_clkdiv[2] is rs232_t:u5|send:u2|clkdiv[2]
--operation mode is arithmetic