count.vhd

FPGA的串口通信程序

--放大电路中x9511控制信号要求有一定的宽度，故要求发送的控制信号在脉宽上有一定的限制
--the parameter clkout determined the width of the ctrl signal
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;

entity count is
port 
(
	  clkin	 	: in std_logic ;
	  clkout	: out std_logic
) ;
end count ;

architecture rtl of count is

signal count: unsigned (21 downto 0);

begin

process(clkin)
begin
if clkin'event and clkin = '1' then
if std_logic_vector(count) = "1010000000000000000000"  then
	 count <= "0000000000000000000000";
else count <= count + "0000000000000000000001";		--计数
end if;
end if;
end process;

process(clkin)
begin
if clkin'event and clkin = '1' then
if count(21) = '1' then
	 clkout <= '0';
else clkout <= '1';									--得出控制信号
end if;
end if;
end process;

end;