lianxiantu.rpt

在maxplusII上用VHDL语言编程实现的数字基带信号的同步提取

Project Information                                  d:\chengxu\lianxiantu.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 09/14/2007 08:13:20

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

lianxiantu
      EP1K30QC208-3        12     45     0    0         0  %    330      19 %

User Pins:                 12     45     0  



Project Information                                  d:\chengxu\lianxiantu.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

lianxiantu@9                      clk
lianxiantu@79                     clk1
lianxiantu@127                    DOUT0
lianxiantu@128                    DOUT1
lianxiantu@131                    DOUT2
lianxiantu@132                    DOUT3
lianxiantu@133                    DOUT4
lianxiantu@134                    DOUT5
lianxiantu@135                    DOUT6
lianxiantu@136                    DOUT7
lianxiantu@139                    DOUT8
lianxiantu@140                    DOUT9
lianxiantu@141                    DOUT10
lianxiantu@142                    DOUT11
lianxiantu@143                    DOUT12
lianxiantu@144                    DOUT13
lianxiantu@147                    DOUT14
lianxiantu@148                    DOUT15
lianxiantu@120                    DOUT16
lianxiantu@119                    DOUT17
lianxiantu@116                    DOUT18
lianxiantu@115                    DOUT19
lianxiantu@114                    DOUT20
lianxiantu@113                    DOUT21
lianxiantu@112                    DOUT22
lianxiantu@111                    DOUT23
lianxiantu@183                    FSIN
lianxiantu@94                     IO_DS1
lianxiantu@95                     IO_DS2
lianxiantu@96                     IO_DS3
lianxiantu@97                     IO_DS4
lianxiantu@99                     IO_DS5
lianxiantu@100                    IO_DS6
lianxiantu@53                     kb0
lianxiantu@69                     keydata0
lianxiantu@70                     keydata1
lianxiantu@71                     keydata2
lianxiantu@73                     keydata3
lianxiantu@74                     keydata4
lianxiantu@75                     keydata5
lianxiantu@78                     keydata6
lianxiantu@80                     keydata7
lianxiantu@54                     keyout1
lianxiantu@55                     keyout2
lianxiantu@56                     keyout3
lianxiantu@57                     keyout4
lianxiantu@45                     reset
lianxiantu@38                     sel0
lianxiantu@39                     sel1
lianxiantu@40                     sel2
lianxiantu@86                     shumaguan0
lianxiantu@87                     shumaguan1
lianxiantu@88                     shumaguan2
lianxiantu@89                     shumaguan3
lianxiantu@90                     shumaguan4
lianxiantu@92                     shumaguan5
lianxiantu@93                     shumaguan6


Project Information                                  d:\chengxu\lianxiantu.rpt

** STATE MACHINE ASSIGNMENTS **


|ZTJA:27|m_state: MACHINE
        OF BITS (
           |ZTJA:27|m_state~5,
           |ZTJA:27|m_state~4,
           |ZTJA:27|m_state~3,
           |ZTJA:27|m_state~2,
           |ZTJA:27|m_state~1
        )
        WITH STATES (
                              s0 = B"00000", 
                              s1 = B"11000", 
                              s2 = B"10100", 
                              s3 = B"10010", 
                              s4 = B"10001"
);



Project Information                                  d:\chengxu\lianxiantu.rpt

** FILE HIERARCHY **



|keyboard:1|
|keyboard:1|lpm_add_sub:72|
|keyboard:1|lpm_add_sub:72|addcore:adder|
|keyboard:1|lpm_add_sub:72|altshift:result_ext_latency_ffs|
|keyboard:1|lpm_add_sub:72|altshift:carry_ext_latency_ffs|
|keyboard:1|lpm_add_sub:72|altshift:oflow_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|
|keyboard:1|lpm_add_sub:375|addcore:adder|
|keyboard:1|lpm_add_sub:375|altshift:result_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|altshift:carry_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|altshift:oflow_ext_latency_ffs|
|led:2|
|led:2|lpm_add_sub:17|
|led:2|lpm_add_sub:17|addcore:adder|
|led:2|lpm_add_sub:17|altshift:result_ext_latency_ffs|
|led:2|lpm_add_sub:17|altshift:carry_ext_latency_ffs|
|led:2|lpm_add_sub:17|altshift:oflow_ext_latency_ffs|
|mux8:3|
|store:4|
|xs:5|
|div16:6|
|div16:6|lpm_add_sub:48|
|div16:6|lpm_add_sub:48|addcore:adder|
|div16:6|lpm_add_sub:48|altshift:result_ext_latency_ffs|
|div16:6|lpm_add_sub:48|altshift:carry_ext_latency_ffs|
|div16:6|lpm_add_sub:48|altshift:oflow_ext_latency_ffs|
|div16:6|lpm_add_sub:80|
|div16:6|lpm_add_sub:80|addcore:adder|
|div16:6|lpm_add_sub:80|altshift:result_ext_latency_ffs|
|div16:6|lpm_add_sub:80|altshift:carry_ext_latency_ffs|
|div16:6|lpm_add_sub:80|altshift:oflow_ext_latency_ffs|
|div16:6|lpm_compare:108|
|div16:6|lpm_compare:108|comptree:comparator|
|div16:6|lpm_compare:108|comptree:comparator|cmpchain:cmp_end|
|div16:6|lpm_compare:108|altshift:aeb_ext_lat_ffs|
|div16:6|lpm_compare:108|altshift:agb_ext_lat_ffs|
|div16:6|lpm_compare:109|
|div16:6|lpm_compare:109|comptree:comparator|