fourbitadder.hier_info

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

|fourbitadder
x[0] => onebitadder:U0.x
x[1] => onebitadder:U1.x
x[2] => onebitadder:U2.x
x[3] => onebitadder:U3.x
y[0] => onebitadder:U0.y
y[1] => onebitadder:U1.y
y[2] => onebitadder:U2.y
y[3] => onebitadder:U3.y
dcin => onebitadder:U0.cin
sum[0] <= onebitadder:U0.sum
sum[1] <= onebitadder:U1.sum
sum[2] <= onebitadder:U2.sum
sum[3] <= onebitadder:U3.sum
dcount <= onebitadder:U3.count


|fourbitadder|onebitadder:U0
x => count~1.IN0
x => count~0.IN0
x => sum~0.IN0
y => count~3.IN0
y => count~0.IN1
y => sum~0.IN1
cin => count~3.IN1
cin => count~1.IN1
cin => sum~1.IN1
sum <= sum~1.DB_MAX_OUTPUT_PORT_TYPE
count <= count~4.DB_MAX_OUTPUT_PORT_TYPE


|fourbitadder|onebitadder:U1
x => count~1.IN0
x => count~0.IN0
x => sum~0.IN0
y => count~3.IN0
y => count~0.IN1
y => sum~0.IN1
cin => count~3.IN1
cin => count~1.IN1
cin => sum~1.IN1
sum <= sum~1.DB_MAX_OUTPUT_PORT_TYPE
count <= count~4.DB_MAX_OUTPUT_PORT_TYPE


|fourbitadder|onebitadder:U2
x => count~1.IN0
x => count~0.IN0
x => sum~0.IN0
y => count~3.IN0
y => count~0.IN1
y => sum~0.IN1
cin => count~3.IN1
cin => count~1.IN1
cin => sum~1.IN1
sum <= sum~1.DB_MAX_OUTPUT_PORT_TYPE
count <= count~4.DB_MAX_OUTPUT_PORT_TYPE


|fourbitadder|onebitadder:U3
x => count~1.IN0
x => count~0.IN0
x => sum~0.IN0
y => count~3.IN0
y => count~0.IN1
y => sum~0.IN1
cin => count~3.IN1
cin => count~1.IN1
cin => sum~1.IN1
sum <= sum~1.DB_MAX_OUTPUT_PORT_TYPE
count <= count~4.DB_MAX_OUTPUT_PORT_TYPE