onebitadder.hier_info

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

|onebitadder
x => count~1.IN0
x => count~0.IN0
x => sum~0.IN0
y => count~3.IN0
y => count~0.IN1
y => sum~0.IN1
cin => count~3.IN1
cin => count~1.IN1
cin => sum~1.IN1
sum <= sum~1.DB_MAX_OUTPUT_PORT_TYPE
count <= count~4.DB_MAX_OUTPUT_PORT_TYPE