ctime.hier_info

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

|ctime
clk => six:U5.clk2
clk => ten:U4.clk1
clk => six:U3.clk2
clk => ten:U2.clk1
clk => six:U1.clk2
clk => set.CLK
clk => ten:U0.clk1
a0[0] <= decoder:X0.x[0]
a0[1] <= decoder:X0.x[1]
a0[2] <= decoder:X0.x[2]
a0[3] <= decoder:X0.x[3]
a0[4] <= decoder:X0.x[4]
a0[5] <= decoder:X0.x[5]
a0[6] <= decoder:X0.x[6]
a1[0] <= decoder:X1.x[0]
a1[1] <= decoder:X1.x[1]
a1[2] <= decoder:X1.x[2]
a1[3] <= decoder:X1.x[3]
a1[4] <= decoder:X1.x[4]
a1[5] <= decoder:X1.x[5]
a1[6] <= decoder:X1.x[6]
a2[0] <= decoder:X2.x[0]
a2[1] <= decoder:X2.x[1]
a2[2] <= decoder:X2.x[2]
a2[3] <= decoder:X2.x[3]
a2[4] <= decoder:X2.x[4]
a2[5] <= decoder:X2.x[5]
a2[6] <= decoder:X2.x[6]
a3[0] <= decoder:X3.x[0]
a3[1] <= decoder:X3.x[1]
a3[2] <= decoder:X3.x[2]
a3[3] <= decoder:X3.x[3]
a3[4] <= decoder:X3.x[4]
a3[5] <= decoder:X3.x[5]
a3[6] <= decoder:X3.x[6]
a4[0] <= decoder:X4.x[0]
a4[1] <= decoder:X4.x[1]
a4[2] <= decoder:X4.x[2]
a4[3] <= decoder:X4.x[3]
a4[4] <= decoder:X4.x[4]
a4[5] <= decoder:X4.x[5]
a4[6] <= decoder:X4.x[6]
a5[0] <= decoder:X5.x[0]
a5[1] <= decoder:X5.x[1]
a5[2] <= decoder:X5.x[2]
a5[3] <= decoder:X5.x[3]
a5[4] <= decoder:X5.x[4]
a5[5] <= decoder:X5.x[5]
a5[6] <= decoder:X5.x[6]
a6[0] <= decoder:X6.x[0]
a6[1] <= decoder:X6.x[1]
a6[2] <= decoder:X6.x[2]
a6[3] <= decoder:X6.x[3]
a6[4] <= decoder:X6.x[4]
a6[5] <= decoder:X6.x[5]
a6[6] <= decoder:X6.x[6]
a7[0] <= decoder:X7.x[0]
a7[1] <= decoder:X7.x[1]
a7[2] <= decoder:X7.x[2]
a7[3] <= decoder:X7.x[3]
a7[4] <= decoder:X7.x[4]
a7[5] <= decoder:X7.x[5]
a7[6] <= decoder:X7.x[6]


|ctime|ten:U0
a[0] <= comb~4
a[1] <= comb~6
a[2] <= comb~0
a[3] <= comb~2
clk1 => a[3]~reg0.CLK
clk1 => a[2]~reg0.CLK
clk1 => a[1]~reg0.CLK
clk1 => a[0]~reg0.CLK
clk1 => cout~reg0.CLK
cin => cout~1.OUTPUTSELECT
cin => a~15.OUTPUTSELECT
cin => a~14.OUTPUTSELECT
cin => a~13.OUTPUTSELECT
cin => a~12.OUTPUTSELECT
reset => cout~0.OUTPUTSELECT
reset => a~11.OUTPUTSELECT
reset => a~10.OUTPUTSELECT
reset => a~9.OUTPUTSELECT
reset => a~8.OUTPUTSELECT
cout <= cout~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|six:U1
b[0] <= comb~4
b[1] <= comb~6
b[2] <= comb~0
b[3] <= comb~2
clk2 => b[3]~reg0.CLK
clk2 => b[2]~reg0.CLK
clk2 => b[1]~reg0.CLK
clk2 => b[0]~reg0.CLK
clk2 => cou~reg0.CLK
ci => cou~1.OUTPUTSELECT
ci => b~15.OUTPUTSELECT
ci => b~14.OUTPUTSELECT
ci => b~13.OUTPUTSELECT
ci => b~12.OUTPUTSELECT
rese => cou~0.OUTPUTSELECT
rese => b~11.OUTPUTSELECT
rese => b~10.OUTPUTSELECT
rese => b~9.OUTPUTSELECT
rese => b~8.OUTPUTSELECT
cou <= cou~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|ten:U2
a[0] <= comb~4
a[1] <= comb~6
a[2] <= comb~0
a[3] <= comb~2
clk1 => a[3]~reg0.CLK
clk1 => a[2]~reg0.CLK
clk1 => a[1]~reg0.CLK
clk1 => a[0]~reg0.CLK
clk1 => cout~reg0.CLK
cin => cout~1.OUTPUTSELECT
cin => a~15.OUTPUTSELECT
cin => a~14.OUTPUTSELECT
cin => a~13.OUTPUTSELECT
cin => a~12.OUTPUTSELECT
reset => cout~0.OUTPUTSELECT
reset => a~11.OUTPUTSELECT
reset => a~10.OUTPUTSELECT
reset => a~9.OUTPUTSELECT
reset => a~8.OUTPUTSELECT
cout <= cout~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|six:U3
b[0] <= comb~4
b[1] <= comb~6
b[2] <= comb~0
b[3] <= comb~2
clk2 => b[3]~reg0.CLK
clk2 => b[2]~reg0.CLK
clk2 => b[1]~reg0.CLK
clk2 => b[0]~reg0.CLK
clk2 => cou~reg0.CLK
ci => cou~1.OUTPUTSELECT
ci => b~15.OUTPUTSELECT
ci => b~14.OUTPUTSELECT
ci => b~13.OUTPUTSELECT
ci => b~12.OUTPUTSELECT
rese => cou~0.OUTPUTSELECT
rese => b~11.OUTPUTSELECT
rese => b~10.OUTPUTSELECT
rese => b~9.OUTPUTSELECT
rese => b~8.OUTPUTSELECT
cou <= cou~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|ten:U4
a[0] <= comb~4
a[1] <= comb~6
a[2] <= comb~0
a[3] <= comb~2
clk1 => a[3]~reg0.CLK
clk1 => a[2]~reg0.CLK
clk1 => a[1]~reg0.CLK
clk1 => a[0]~reg0.CLK
clk1 => cout~reg0.CLK
cin => cout~1.OUTPUTSELECT
cin => a~15.OUTPUTSELECT
cin => a~14.OUTPUTSELECT
cin => a~13.OUTPUTSELECT
cin => a~12.OUTPUTSELECT
reset => cout~0.OUTPUTSELECT
reset => a~11.OUTPUTSELECT
reset => a~10.OUTPUTSELECT
reset => a~9.OUTPUTSELECT
reset => a~8.OUTPUTSELECT
cout <= cout~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|six:U5
b[0] <= comb~4
b[1] <= comb~6
b[2] <= comb~0
b[3] <= comb~2
clk2 => b[3]~reg0.CLK
clk2 => b[2]~reg0.CLK
clk2 => b[1]~reg0.CLK
clk2 => b[0]~reg0.CLK
clk2 => cou~reg0.CLK
ci => cou~1.OUTPUTSELECT
ci => b~15.OUTPUTSELECT
ci => b~14.OUTPUTSELECT
ci => b~13.OUTPUTSELECT
ci => b~12.OUTPUTSELECT
rese => cou~0.OUTPUTSELECT
rese => b~11.OUTPUTSELECT
rese => b~10.OUTPUTSELECT
rese => b~9.OUTPUTSELECT
rese => b~8.OUTPUTSELECT
cou <= cou~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X0
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X1
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X2
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X3
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X4
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X5
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X6
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|ctime|decoder:X7
d[0] => Mux6.IN19
d[0] => Mux5.IN19
d[0] => Mux4.IN19
d[0] => Mux3.IN19
d[0] => Mux2.IN19
d[0] => Mux1.IN19
d[0] => Mux0.IN19
d[1] => Mux6.IN18
d[1] => Mux5.IN18
d[1] => Mux4.IN18
d[1] => Mux3.IN18
d[1] => Mux2.IN18
d[1] => Mux1.IN18
d[1] => Mux0.IN18
d[2] => Mux6.IN17
d[2] => Mux5.IN17
d[2] => Mux4.IN17
d[2] => Mux3.IN17
d[2] => Mux2.IN17
d[2] => Mux1.IN17
d[2] => Mux0.IN17
d[3] => Mux6.IN16
d[3] => Mux5.IN16
d[3] => Mux4.IN16
d[3] => Mux3.IN16
d[3] => Mux2.IN16
d[3] => Mux1.IN16
d[3] => Mux0.IN16
x[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE