ten.hier_info

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

|ten
a[0] <= comb~3
a[1] <= comb~5
a[2] <= comb~7
a[3] <= comb~1
cin => a[3]$latch.LATCH_ENABLE
cin => a[2]$latch.LATCH_ENABLE
cin => a[1]$latch.LATCH_ENABLE
cin => a[0]$latch.LATCH_ENABLE
cin => cout$latch.ACLR
reset => a~11.OUTPUTSELECT
reset => a~10.OUTPUTSELECT
reset => a~9.OUTPUTSELECT
reset => a~8.OUTPUTSELECT
reset => cout$latch.LATCH_ENABLE
cout <= cout$latch.DB_MAX_OUTPUT_PORT_TYPE