controlunit.hif

CPU设计中的controlunit源码

Version 5.1 Build 176 10/26/2005 SJ Full Version
37
1903
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
# entity
lpm_rom
# storage
db|controlunit.(1).cnf
db|controlunit.(1).cnf
# case_insensitive
# source_file
d:|program files|quartus51|libraries|megafunctions|LPM_ROM.tdf
ac6c87d45f987dabd1fb71db45df2e6
6
# user_parameter {
LPM_WIDTH
8
PARAMETER_DEC
USR
LPM_WIDTHAD
8
PARAMETER_DEC
USR
LPM_NUMWORDS
0
PARAMETER_DEC
USR
LPM_ADDRESS_CONTROL
REGISTERED
PARAMETER_UNKNOWN
USR
LPM_OUTDATA
UNREGISTERED
PARAMETER_UNKNOWN
USR
LPM_FILE
controlunit.mif
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
MEMENAB
-1
3
INCLOCK
-1
3
ADDRESS7
-1
3
ADDRESS6
-1
3
ADDRESS5
-1
3
ADDRESS4
-1
3
ADDRESS3
-1
3
ADDRESS2
-1
3
ADDRESS1
-1
3
ADDRESS0
-1
3
}
# include_file {
d:|program files|quartus51|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
}
# hierarchies {
lpm_rom:U5
}
# end
# entity
altrom
# storage
db|controlunit.(2).cnf
db|controlunit.(2).cnf
# case_insensitive
# source_file
d:|program files|quartus51|libraries|megafunctions|altrom.tdf
78da7c8f20e8831f55b9a8e5e34e3d4
6
# user_parameter {
WIDTH
8
PARAMETER_UNKNOWN
USR
AD_WIDTH
8
PARAMETER_UNKNOWN
USR
NUMWORDS
256
PARAMETER_UNKNOWN
USR
FILE
controlunit.mif
PARAMETER_UNKNOWN
USR
REGISTERINPUTMODE
ADDRESS_CONTROL
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
2048
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
SUPPRESS_MEMORY_CONVERSION_WARNINGS
OFF
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clocki
-1
3
address7
-1
3
address6
-1
3
address5
-1
3
address4
-1
3
address3
-1
3
address2
-1
3
address1
-1
3
address0
-1
3
}
# include_file {
d:|program files|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
d:|program files|quartus51|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|program files|quartus51|libraries|others|maxplus2|memmodes.inc
44d4551a35f349f0dbacaf799d39950
d:|program files|quartus51|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
d:|program files|quartus51|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|program files|quartus51|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
}
# hierarchies {
lpm_rom:U5|altrom:srom
}
# end
# entity
altsyncram
# storage
db|controlunit.(3).cnf
db|controlunit.(3).cnf
# case_insensitive
# source_file
d:|program files|quartus51|libraries|megafunctions|altsyncram.tdf
2e50408acd947bab10aa53249c64526
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
8
PARAMETER_UNKNOWN
USR
WIDTHAD_A
8
PARAMETER_UNKNOWN
USR
NUMWORDS_A
256
PARAMETER_UNKNOWN
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
controlunit.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_vcp
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
d:|program files|quartus51|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
d:|program files|quartus51|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|program files|quartus51|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
d:|program files|quartus51|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|program files|quartus51|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
d:|program files|quartus51|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|program files|quartus51|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
d:|program files|quartus51|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
d:|program files|quartus51|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
}
# hierarchies {
lpm_rom:U5|altrom:srom|altsyncram:rom_block
}
# end
# entity
altsyncram
# storage
db|controlunit.(5).cnf
db|controlunit.(5).cnf
# case_insensitive
# source_file
d:|program files|quartus51|libraries|megafunctions|altsyncram.tdf
2e50408acd947bab10aa53249c64526
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
4
PARAMETER_UNKNOWN
USR
WIDTHAD_A
8
PARAMETER_UNKNOWN
USR
NUMWORDS_A
256
PARAMETER_UNKNOWN
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
controlunit0.rtl.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_fql
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
d:|program files|quartus51|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
d:|program files|quartus51|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|program files|quartus51|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
d:|program files|quartus51|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|program files|quartus51|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
d:|program files|quartus51|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|program files|quartus51|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
d:|program files|quartus51|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
d:|program files|quartus51|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
}
# end
# entity
altsyncram_fql
# storage
db|controlunit.(6).cnf
db|controlunit.(6).cnf
# case_insensitive
# source_file
db|altsyncram_fql.tdf
9dfc54f85f9a47c5af987eb8af4363
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
controlunit0.rtl.mif
0
}
# end
# entity
altsyncram_vcp
# storage
db|controlunit.(4).cnf
db|controlunit.(4).cnf
# case_insensitive
# source_file
db|altsyncram_vcp.tdf
d7478f5df607c514c7eb46adc819573
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
controlunit.mif
afa36229802d311e2b7c5a56917556d7
}
# hierarchies {
lpm_rom:U5|altrom:srom|altsyncram:rom_block|altsyncram_vcp:auto_generated
}
# end
# entity
LPM_ROM
# storage
db|controlunit.(7).cnf
db|controlunit.(7).cnf
# case_insensitive
# source_file
d:|program files|quartus51|libraries|megafunctions|LPM_ROM.tdf
ac6c87d45f987dabd1fb71db45df2e6
6
# user_parameter {
LPM_WIDTH
8
PARAMETER_DEC
USR
LPM_WIDTHAD
8
PARAMETER_DEC
USR
LPM_NUMWORDS
0
PARAMETER_DEC
USR
LPM_ADDRESS_CONTROL
UNREGISTERED
PARAMETER_UNKNOWN
USR
LPM_OUTDATA
UNREGISTERED
PARAMETER_UNKNOWN
USR
LPM_FILE
controlunit.mif
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
MEMENAB
-1
3
ADDRESS7
-1
3
ADDRESS6
-1
3
ADDRESS5
-1
3
ADDRESS4
-1
3
ADDRESS3
-1
3
ADDRESS2
-1
3
ADDRESS1
-1
3
ADDRESS0
-1
3
}
# include_file {
d:|program files|quartus51|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
}
# end
# entity
controlunit
# storage
db|controlunit.(0).cnf
db|controlunit.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
controlunit.vhd
e2d486cefeb6abcfa7962f2b54b689c
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# complete