i2c_master_top.map.eqn

verilog在cpld上实现i2c主从设备通讯功能

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--A1L152Q is wb_dat_o[0]~reg0
--operation mode is normal

A1L152Q_lut_out = A1L4 & (!wb_adr_i[1] # !wb_adr_i[2] # !wb_adr_i[0]);
A1L152Q = DFFEAS(A1L152Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L154Q is wb_dat_o[1]~reg0
--operation mode is normal

A1L154Q_lut_out = A1L8 & (!wb_adr_i[1] # !wb_adr_i[2] # !wb_adr_i[0]);
A1L154Q = DFFEAS(A1L154Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L156Q is wb_dat_o[2]~reg0
--operation mode is normal

A1L156Q_lut_out = wb_adr_i[2] & A1L9 & A1L160 # !wb_adr_i[2] & (A1L11);
A1L156Q = DFFEAS(A1L156Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L158Q is wb_dat_o[3]~reg0
--operation mode is normal

A1L158Q_lut_out = wb_adr_i[2] & A1L160 & A1L12 # !wb_adr_i[2] & (A1L14);
A1L158Q = DFFEAS(A1L158Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L161Q is wb_dat_o[4]~reg0
--operation mode is normal

A1L161Q_lut_out = wb_adr_i[2] & A1L160 & A1L15 # !wb_adr_i[2] & (A1L17);
A1L161Q = DFFEAS(A1L161Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L163Q is wb_dat_o[5]~reg0
--operation mode is normal

A1L163Q_lut_out = A1L21 & (!wb_adr_i[1] # !wb_adr_i[2] # !wb_adr_i[0]);
A1L163Q = DFFEAS(A1L163Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L165Q is wb_dat_o[6]~reg0
--operation mode is normal

A1L165Q_lut_out = A1L25 & (!wb_adr_i[1] # !wb_adr_i[2] # !wb_adr_i[0]);
A1L165Q = DFFEAS(A1L165Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L167Q is wb_dat_o[7]~reg0
--operation mode is normal

A1L167Q_lut_out = A1L29 & (!wb_adr_i[1] # !wb_adr_i[2] # !wb_adr_i[0]);
A1L167Q = DFFEAS(A1L167Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L132Q is wb_ack_o~reg0
--operation mode is normal

A1L132Q_lut_out = wb_stb_i & wb_cyc_i & (!A1L132Q);
A1L132Q = DFFEAS(A1L132Q_lut_out, wb_clk_i, VCC, , , , , , );


--A1L169Q is wb_inta_o~reg0
--operation mode is normal

A1L169Q_lut_out = irq_flag & ctr[6];
A1L169Q = DFFEAS(A1L169Q_lut_out, wb_clk_i, arst_i, , , , , wb_rst_i, );


--C1_scl_oen is i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|scl_oen
--operation mode is normal

C1_scl_oen_lut_out = !A1L109 & (C1_c_state.stop_a # !C1L11 # !C1L10);
C1_scl_oen = DFFEAS(C1_scl_oen_lut_out, wb_clk_i, arst_i, , A1L108, , , , );


--C1_sda_oen is i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|sda_oen
--operation mode is normal

C1_sda_oen_lut_out = !C1L87 & (C1_clk_en # !C1L88 & !C1L90);
C1_sda_oen = DFFEAS(C1_sda_oen_lut_out, wb_clk_i, arst_i, , , , , , );


--txr[0] is txr[0]
--operation mode is normal

txr[0]_lut_out = A1L56;
txr[0] = DFFEAS(txr[0]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--A1L150 is wb_dat_o[0]~162
--operation mode is normal

A1L150 = wb_adr_i[0] & (wb_adr_i[2] # wb_adr_i[1]);


--ctr[0] is ctr[0]
--operation mode is normal

ctr[0]_lut_out = A1L56;
ctr[0] = DFFEAS(ctr[0]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--irq_flag is irq_flag
--operation mode is normal

irq_flag_lut_out = !cr[0] & (irq_flag # B1_cmd_ack # C1_al);
irq_flag = DFFEAS(irq_flag_lut_out, wb_clk_i, arst_i, , , , , wb_rst_i, );


--prer[0] is prer[0]
--operation mode is normal

prer[0]_lut_out = !A1L100;
prer[0] = DFFEAS(prer[0]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L1 is Select~915
--operation mode is normal

A1L1 = wb_adr_i[1] & (wb_adr_i[2]) # !wb_adr_i[1] & (wb_adr_i[2] & irq_flag # !wb_adr_i[2] & (!prer[0]));


--cr[0] is cr[0]
--operation mode is normal

cr[0]_lut_out = wb_dat_i[0] & wb_wacc & (!wb_rst_i);
cr[0] = DFFEAS(cr[0]_lut_out, wb_clk_i, arst_i, , A1L35, , , , );


--A1L2 is Select~916
--operation mode is normal

A1L2 = wb_adr_i[1] & (A1L1 & (cr[0]) # !A1L1 & ctr[0]) # !wb_adr_i[1] & (A1L1);


--A1L151 is wb_dat_o[0]~163
--operation mode is normal

A1L151 = wb_adr_i[0] & (!wb_adr_i[1]);


--prer[8] is prer[8]
--operation mode is normal

prer[8]_lut_out = !A1L100;
prer[8] = DFFEAS(prer[8]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--A1L3 is Select~917
--operation mode is normal

A1L3 = A1L150 & (!A1L151) # !A1L150 & (A1L151 & (!prer[8]) # !A1L151 & A1L2);


--B1_sr[0] is i2c_master_byte_ctrl:byte_controller|sr[0]
--operation mode is normal

B1_sr[0]_lut_out = B1_ld & (txr[0]) # !B1_ld & C1_dout;
B1_sr[0] = DFFEAS(B1_sr[0]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L4 is Select~918
--operation mode is normal

A1L4 = A1L150 & (A1L3 & (B1_sr[0]) # !A1L3 & txr[0]) # !A1L150 & (A1L3);


--ctr[1] is ctr[1]
--operation mode is normal

ctr[1]_lut_out = A1L57;
ctr[1] = DFFEAS(ctr[1]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--tip is tip
--operation mode is normal

tip_lut_out = !wb_rst_i & (cr[4] # cr[5]);
tip = DFFEAS(tip_lut_out, wb_clk_i, arst_i, , , , , , );


--prer[1] is prer[1]
--operation mode is normal

prer[1]_lut_out = !A1L101;
prer[1] = DFFEAS(prer[1]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L5 is Select~920
--operation mode is normal

A1L5 = wb_adr_i[1] & (wb_adr_i[2]) # !wb_adr_i[1] & (wb_adr_i[2] & tip # !wb_adr_i[2] & (!prer[1]));


--cr[1] is cr[1]
--operation mode is normal

cr[1]_lut_out = wb_wacc & wb_dat_i[1] & (!wb_rst_i);
cr[1] = DFFEAS(cr[1]_lut_out, wb_clk_i, arst_i, , A1L35, , , , );


--A1L6 is Select~921
--operation mode is normal

A1L6 = wb_adr_i[1] & (A1L5 & (cr[1]) # !A1L5 & ctr[1]) # !wb_adr_i[1] & (A1L5);


--txr[1] is txr[1]
--operation mode is normal

txr[1]_lut_out = A1L57;
txr[1] = DFFEAS(txr[1]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--prer[9] is prer[9]
--operation mode is normal

prer[9]_lut_out = !A1L101;
prer[9] = DFFEAS(prer[9]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--A1L7 is Select~922
--operation mode is normal

A1L7 = A1L151 & (A1L150 & txr[1] # !A1L150 & (!prer[9])) # !A1L151 & (A1L150);


--B1_sr[1] is i2c_master_byte_ctrl:byte_controller|sr[1]
--operation mode is normal

B1_sr[1]_lut_out = B1_ld & (txr[1]) # !B1_ld & B1_sr[0];
B1_sr[1] = DFFEAS(B1_sr[1]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L8 is Select~923
--operation mode is normal

A1L8 = A1L151 & (A1L7) # !A1L151 & (A1L7 & (B1_sr[1]) # !A1L7 & A1L6);


--txr[2] is txr[2]
--operation mode is normal

txr[2]_lut_out = A1L58;
txr[2] = DFFEAS(txr[2]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--cr[2] is cr[2]
--operation mode is normal

cr[2]_lut_out = wb_wacc & wb_dat_i[2] & (!wb_rst_i);
cr[2] = DFFEAS(cr[2]_lut_out, wb_clk_i, arst_i, , A1L35, , , , );


--A1L9 is Select~925
--operation mode is normal

A1L9 = wb_adr_i[0] & txr[2] # !wb_adr_i[0] & (cr[2]);


--A1L160 is wb_dat_o[4]~164
--operation mode is normal

A1L160 = wb_adr_i[0] $ wb_adr_i[1];


--prer[10] is prer[10]
--operation mode is normal

prer[10]_lut_out = !A1L102;
prer[10] = DFFEAS(prer[10]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--ctr[2] is ctr[2]
--operation mode is normal

ctr[2]_lut_out = A1L58;
ctr[2] = DFFEAS(ctr[2]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--prer[2] is prer[2]
--operation mode is normal

prer[2]_lut_out = !A1L102;
prer[2] = DFFEAS(prer[2]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L10 is Select~926
--operation mode is normal

A1L10 = wb_adr_i[0] & (wb_adr_i[1]) # !wb_adr_i[0] & (wb_adr_i[1] & ctr[2] # !wb_adr_i[1] & (!prer[2]));


--B1_sr[2] is i2c_master_byte_ctrl:byte_controller|sr[2]
--operation mode is normal

B1_sr[2]_lut_out = B1_ld & (txr[2]) # !B1_ld & B1_sr[1];
B1_sr[2] = DFFEAS(B1_sr[2]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L11 is Select~927
--operation mode is normal

A1L11 = wb_adr_i[0] & (A1L10 & (B1_sr[2]) # !A1L10 & !prer[10]) # !wb_adr_i[0] & (A1L10);


--txr[3] is txr[3]
--operation mode is normal

txr[3]_lut_out = A1L59;
txr[3] = DFFEAS(txr[3]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--cr[3] is cr[3]
--operation mode is normal

cr[3]_lut_out = A1L131 & (wb_we_i & (A1L45) # !wb_we_i & cr[3]) # !A1L131 & cr[3];
cr[3] = DFFEAS(cr[3]_lut_out, wb_clk_i, arst_i, , , , , wb_rst_i, );


--A1L12 is Select~929
--operation mode is normal

A1L12 = wb_adr_i[0] & txr[3] # !wb_adr_i[0] & (cr[3]);


--prer[11] is prer[11]
--operation mode is normal

prer[11]_lut_out = !A1L103;
prer[11] = DFFEAS(prer[11]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--ctr[3] is ctr[3]
--operation mode is normal

ctr[3]_lut_out = A1L59;
ctr[3] = DFFEAS(ctr[3]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--prer[3] is prer[3]
--operation mode is normal

prer[3]_lut_out = !A1L103;
prer[3] = DFFEAS(prer[3]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L13 is Select~930
--operation mode is normal

A1L13 = wb_adr_i[0] & (wb_adr_i[1]) # !wb_adr_i[0] & (wb_adr_i[1] & ctr[3] # !wb_adr_i[1] & (!prer[3]));


--B1_sr[3] is i2c_master_byte_ctrl:byte_controller|sr[3]
--operation mode is normal

B1_sr[3]_lut_out = B1_ld & (txr[3]) # !B1_ld & B1_sr[2];
B1_sr[3] = DFFEAS(B1_sr[3]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L14 is Select~931
--operation mode is normal

A1L14 = wb_adr_i[0] & (A1L13 & (B1_sr[3]) # !A1L13 & !prer[11]) # !wb_adr_i[0] & (A1L13);


--txr[4] is txr[4]
--operation mode is normal

txr[4]_lut_out = A1L60;
txr[4] = DFFEAS(txr[4]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--cr[4] is cr[4]
--operation mode is normal

cr[4]_lut_out = wb_wacc & wb_dat_i[4] & (!wb_rst_i);
cr[4] = DFFEAS(cr[4]_lut_out, wb_clk_i, arst_i, , A1L44, , , , );


--A1L15 is Select~933
--operation mode is normal

A1L15 = wb_adr_i[0] & txr[4] # !wb_adr_i[0] & (cr[4]);


--prer[12] is prer[12]
--operation mode is normal

prer[12]_lut_out = !A1L104;
prer[12] = DFFEAS(prer[12]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--ctr[4] is ctr[4]
--operation mode is normal

ctr[4]_lut_out = A1L60;
ctr[4] = DFFEAS(ctr[4]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--prer[4] is prer[4]
--operation mode is normal

prer[4]_lut_out = !A1L104;
prer[4] = DFFEAS(prer[4]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L16 is Select~934
--operation mode is normal

A1L16 = wb_adr_i[0] & (wb_adr_i[1]) # !wb_adr_i[0] & (wb_adr_i[1] & ctr[4] # !wb_adr_i[1] & (!prer[4]));


--B1_sr[4] is i2c_master_byte_ctrl:byte_controller|sr[4]
--operation mode is normal

B1_sr[4]_lut_out = B1_ld & (txr[4]) # !B1_ld & B1_sr[3];
B1_sr[4] = DFFEAS(B1_sr[4]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L17 is Select~935
--operation mode is normal

A1L17 = wb_adr_i[0] & (A1L16 & (B1_sr[4]) # !A1L16 & !prer[12]) # !wb_adr_i[0] & (A1L16);


--txr[5] is txr[5]
--operation mode is normal

txr[5]_lut_out = A1L61;
txr[5] = DFFEAS(txr[5]_lut_out, wb_clk_i, arst_i, , A1L124, , , , );


--al is al
--operation mode is normal

al_lut_out = C1_al # !cr[7] & (al);
al = DFFEAS(al_lut_out, wb_clk_i, arst_i, , , , , wb_rst_i, );


--ctr[5] is ctr[5]
--operation mode is normal

ctr[5]_lut_out = A1L61;
ctr[5] = DFFEAS(ctr[5]_lut_out, wb_clk_i, arst_i, , A1L55, , , , );


--prer[5] is prer[5]
--operation mode is normal

prer[5]_lut_out = !A1L105;
prer[5] = DFFEAS(prer[5]_lut_out, wb_clk_i, arst_i, , A1L75, , , , );


--A1L18 is Select~937
--operation mode is normal

A1L18 = wb_adr_i[2] & (wb_adr_i[1]) # !wb_adr_i[2] & (wb_adr_i[1] & ctr[5] # !wb_adr_i[1] & (!prer[5]));


--cr[5] is cr[5]
--operation mode is normal

cr[5]_lut_out = wb_wacc & wb_dat_i[5] & (!wb_rst_i);
cr[5] = DFFEAS(cr[5]_lut_out, wb_clk_i, arst_i, , A1L44, , , , );


--A1L19 is Select~938
--operation mode is normal

A1L19 = wb_adr_i[2] & (A1L18 & (cr[5]) # !A1L18 & al) # !wb_adr_i[2] & (A1L18);


--prer[13] is prer[13]
--operation mode is normal

prer[13]_lut_out = !A1L105;
prer[13] = DFFEAS(prer[13]_lut_out, wb_clk_i, arst_i, , A1L86, , , , );


--A1L20 is Select~939
--operation mode is normal

A1L20 = A1L150 & (!A1L151) # !A1L150 & (A1L151 & (!prer[13]) # !A1L151 & A1L19);


--B1_sr[5] is i2c_master_byte_ctrl:byte_controller|sr[5]
--operation mode is normal

B1_sr[5]_lut_out = B1_ld & (txr[5]) # !B1_ld & B1_sr[4];
B1_sr[5] = DFFEAS(B1_sr[5]_lut_out, wb_clk_i, arst_i, , B1L44, , , wb_rst_i, );


--A1L21 is Select~940