i2c_master_top.map.rpt

verilog在cpld上实现i2c主从设备通讯功能

; rd_c           ; 00000100000000000 ; Binary                                                                          ;
; rd_d           ; 00001000000000000 ; Binary                                                                          ;
; wr_a           ; 00010000000000000 ; Binary                                                                          ;
; wr_b           ; 00100000000000000 ; Binary                                                                          ;
; wr_c           ; 01000000000000000 ; Binary                                                                          ;
; wr_d           ; 10000000000000000 ; Binary                                                                          ;
+----------------+-------------------+---------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in D:/My Docu/CPLD/i2c Sample/i2c_master_top.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Sun Nov 18 17:18:46 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off i2c_master_top -c i2c_master_top
Info: Found 1 design units, including 1 entities, in source file i2c_master_bit_ctrl.v
    Info: Found entity 1: i2c_master_bit_ctrl
Info: Found 1 design units, including 1 entities, in source file i2c_master_byte_ctrl.v
    Info: Found entity 1: i2c_master_byte_ctrl
Info: Found 0 design units, including 0 entities, in source file i2c_master_defines.v
Info: Found 1 design units, including 1 entities, in source file i2c_master_top.v
    Info: Found entity 1: i2c_master_top
Info: Found 1 design units, including 1 entities, in source file i2c_slave_model.v
    Info: Found entity 1: i2c_slave_model
Info: Found 0 design units, including 0 entities, in source file timescale.v
Info: Found 1 design units, including 1 entities, in source file tst_bench_top.v
    Info: Found entity 1: tst_bench_top
Info: Elaborating entity "i2c_master_top" for the top level hierarchy
Warning (10270): Verilog HDL statement warning at i2c_master_top.v(122): incomplete Case Statement has no default case item
Warning (10230): Verilog HDL assignment warning at i2c_master_top.v(146): truncated value with size 2 to match size of target (1)
Info: Elaborating entity "i2c_master_byte_ctrl" for hierarchy "i2c_master_byte_ctrl:byte_controller"
Info: Elaborating entity "i2c_master_bit_ctrl" for hierarchy "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller"
Info (10264): Verilog HDL Case Statement information at i2c_master_bit_ctrl.v(288): all case item expressions in this case statement are onehot
Info: State machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state" contains 6 states
Info: State machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state" contains 18 states
Info: Selected Auto state machine encoding method for state machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state"
Info: Encoding result for state machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state"
    Info: Completed encoding using 6 state bits
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_IDLE"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_STOP"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_ACK"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_WRITE"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_READ"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|c_state.ST_START"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_IDLE" uses code string "000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_STOP" uses code string "110000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_WRITE" uses code string "100100"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_READ" uses code string "100010"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_START" uses code string "100001"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|c_state.ST_ACK" uses code string "101000"
Info: Selected Auto state machine encoding method for state machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state"
Info: Encoding result for state machine "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state"
    Info: Completed encoding using 18 state bits
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.idle"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_d"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_c"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_b"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_a"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_d"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_c"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_b"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_a"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_d"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_c"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_b"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_a"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_e"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_d"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_c"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_b"
        Info: Encoded state bit "i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_a"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.idle" uses code string "000000000000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_c" uses code string "101000000000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_b" uses code string "100100000000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_d" uses code string "100001000000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_c" uses code string "100000100000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_b" uses code string "100000010000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_d" uses code string "100000000100000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_c" uses code string "100000000010000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_b" uses code string "100000000001000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_e" uses code string "100000000000010000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_d" uses code string "100000000000001000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_c" uses code string "100000000000000100"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_b" uses code string "100000000000000010"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.rd_a" uses code string "100000001000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_a" uses code string "100010000000000000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.stop_a" uses code string "100000000000100000"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.start_a" uses code string "100000000000000001"
    Info: State "|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state.wr_d" uses code string "110000000000000000"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "scl_pad_o" stuck at GND
    Warning: Pin "sda_pad_o" stuck at GND
Info: Registers with preset signals will power-up high
Info: Implemented 300 device resources after synthesis - the final resource count might be different
    Info: Implemented 19 input pins
    Info: Implemented 14 output pins
    Info: Implemented 267 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings
    Info: Processing ended: Sun Nov 18 17:18:51 2007
    Info: Elapsed time: 00:00:06