i2c_master_top.map.rpt

verilog在cpld上实现i2c主从设备通讯功能

+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 131   ;
; Number of registers using Synchronous Clear  ; 33    ;
; Number of registers using Synchronous Load   ; 16    ;
; Number of registers using Asynchronous Clear ; 120   ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 70    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-------------------------------------------------------------------------------------------+
; Inverted Register Statistics                                                              ;
+---------------------------------------------------------------------------------+---------+
; Inverted Register                                                               ; Fan out ;
+---------------------------------------------------------------------------------+---------+
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|scl_oen ; 3       ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|sda_oen ; 3       ;
; prer[0]                                                                         ; 2       ;
; prer[8]                                                                         ; 2       ;
; prer[1]                                                                         ; 2       ;
; prer[9]                                                                         ; 2       ;
; prer[10]                                                                        ; 2       ;
; prer[2]                                                                         ; 2       ;
; prer[11]                                                                        ; 2       ;
; prer[3]                                                                         ; 2       ;
; prer[12]                                                                        ; 2       ;
; prer[4]                                                                         ; 2       ;
; prer[5]                                                                         ; 2       ;
; prer[13]                                                                        ; 2       ;
; prer[6]                                                                         ; 2       ;
; prer[14]                                                                        ; 2       ;
; prer[7]                                                                         ; 2       ;
; prer[15]                                                                        ; 2       ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|clk_en  ; 23      ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|sSDA    ; 5       ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|sSCL    ; 6       ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|dSCL    ; 1       ;
; i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|dSDA    ; 2       ;
; Total number of inverted registers = 23                                         ;         ;
+---------------------------------------------------------------------------------+---------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                   ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                         ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------+
; 8:1                ; 3 bits    ; 15 LEs        ; 12 LEs               ; 3 LEs                  ; Yes        ; |i2c_master_top|wb_dat_o[4]~reg0                                                                   ;
; 8:1                ; 5 bits    ; 25 LEs        ; 25 LEs               ; 0 LEs                  ; Yes        ; |i2c_master_top|wb_dat_o[0]~reg0                                                                   ;
; 4:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |i2c_master_top|cr[0]                                                                              ;
; 4:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; Yes        ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|dcnt[0]                                       ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|sr[0]                                         ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|txr[2]                                                                             ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|ctr[7]                                                                             ;
; 4:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; Yes        ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|cnt[15]    ;
; 5:1                ; 4 bits    ; 12 LEs        ; 4 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|cr[7]                                                                              ;
; 11:1               ; 2 bits    ; 14 LEs        ; 6 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|core_cmd[3]                                   ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|prer[9]                                                                            ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |i2c_master_top|prer[4]                                                                            ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; No         ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|core_cmd~6                                    ;
; 3:1                ; 14 bits   ; 28 LEs        ; 28 LEs               ; 0 LEs                  ; No         ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state~39 ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; No         ; |i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller|c_state~35 ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |i2c_master_top ;
+----------------+-------+-------------------------------------------------------+
; Parameter Name ; Value ; Type                                                  ;
+----------------+-------+-------------------------------------------------------+
; ARST_LVL       ; 0     ; Binary                                                ;
+----------------+-------+-------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: i2c_master_byte_ctrl:byte_controller ;
+----------------+-------+----------------------------------------------------------+
; Parameter Name ; Value ; Type                                                     ;
+----------------+-------+----------------------------------------------------------+
; ST_IDLE        ; 00000 ; Binary                                                   ;
; ST_START       ; 00001 ; Binary                                                   ;
; ST_READ        ; 00010 ; Binary                                                   ;
; ST_WRITE       ; 00100 ; Binary                                                   ;
; ST_ACK         ; 01000 ; Binary                                                   ;
; ST_STOP        ; 10000 ; Binary                                                   ;
+----------------+-------+----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller ;
+----------------+-------------------+---------------------------------------------------------------------------------+
; Parameter Name ; Value             ; Type                                                                            ;
+----------------+-------------------+---------------------------------------------------------------------------------+
; idle           ; 00000000000000000 ; Binary                                                                          ;
; start_a        ; 00000000000000001 ; Binary                                                                          ;
; start_b        ; 00000000000000010 ; Binary                                                                          ;
; start_c        ; 00000000000000100 ; Binary                                                                          ;
; start_d        ; 00000000000001000 ; Binary                                                                          ;
; start_e        ; 00000000000010000 ; Binary                                                                          ;
; stop_a         ; 00000000000100000 ; Binary                                                                          ;
; stop_b         ; 00000000001000000 ; Binary                                                                          ;
; stop_c         ; 00000000010000000 ; Binary                                                                          ;
; stop_d         ; 00000000100000000 ; Binary                                                                          ;
; rd_a           ; 00000001000000000 ; Binary                                                                          ;
; rd_b           ; 00000010000000000 ; Binary                                                                          ;