i2c_master_top.hier_info

verilog在cpld上实现i2c主从设备通讯功能

|i2c_master_top
wb_clk_i => wb_clk_i~0.IN1
wb_rst_i => wb_rst_i~0.IN1
arst_i => rst_i.IN1
wb_adr_i[0] => Decoder~0.IN2
wb_adr_i[0] => Equal~0.IN5
wb_adr_i[1] => Decoder~0.IN1
wb_adr_i[1] => Equal~0.IN4
wb_adr_i[2] => Decoder~0.IN0
wb_adr_i[2] => Equal~0.IN3
wb_dat_i[0] => prer~23.DATAB
wb_dat_i[0] => prer~31.DATAB
wb_dat_i[0] => ctr~7.DATAB
wb_dat_i[0] => txr~15.DATAB
wb_dat_i[0] => cr~7.DATAB
wb_dat_i[1] => prer~22.DATAB
wb_dat_i[1] => prer~30.DATAB
wb_dat_i[1] => ctr~6.DATAB
wb_dat_i[1] => txr~14.DATAB
wb_dat_i[1] => cr~6.DATAB
wb_dat_i[2] => prer~21.DATAB
wb_dat_i[2] => prer~29.DATAB
wb_dat_i[2] => ctr~5.DATAB
wb_dat_i[2] => txr~13.DATAB
wb_dat_i[2] => cr~5.DATAB
wb_dat_i[3] => prer~20.DATAB
wb_dat_i[3] => prer~28.DATAB
wb_dat_i[3] => ctr~4.DATAB
wb_dat_i[3] => txr~12.DATAB
wb_dat_i[3] => cr~4.DATAB
wb_dat_i[4] => prer~19.DATAB
wb_dat_i[4] => prer~27.DATAB
wb_dat_i[4] => ctr~3.DATAB
wb_dat_i[4] => txr~11.DATAB
wb_dat_i[4] => cr~3.DATAB
wb_dat_i[5] => prer~18.DATAB
wb_dat_i[5] => prer~26.DATAB
wb_dat_i[5] => ctr~2.DATAB
wb_dat_i[5] => txr~10.DATAB
wb_dat_i[5] => cr~2.DATAB
wb_dat_i[6] => prer~17.DATAB
wb_dat_i[6] => prer~25.DATAB
wb_dat_i[6] => ctr~1.DATAB
wb_dat_i[6] => txr~9.DATAB
wb_dat_i[6] => cr~1.DATAB
wb_dat_i[7] => prer~16.DATAB
wb_dat_i[7] => prer~24.DATAB
wb_dat_i[7] => ctr~0.DATAB
wb_dat_i[7] => txr~8.DATAB
wb_dat_i[7] => cr~0.DATAB
wb_dat_o[0] <= wb_dat_o[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[1] <= wb_dat_o[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[2] <= wb_dat_o[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[3] <= wb_dat_o[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[4] <= wb_dat_o[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[5] <= wb_dat_o[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[6] <= wb_dat_o[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_dat_o[7] <= wb_dat_o[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_we_i => wb_wacc.IN1
wb_stb_i => wb_ack_o~0.IN0
wb_cyc_i => wb_ack_o~0.IN1
wb_ack_o <= wb_ack_o~reg0.DB_MAX_OUTPUT_PORT_TYPE
wb_inta_o <= wb_inta_o~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl_pad_i => scl_pad_i~0.IN1
scl_pad_o <= i2c_master_byte_ctrl:byte_controller.scl_o
scl_padoen_o <= i2c_master_byte_ctrl:byte_controller.scl_oen
sda_pad_i => sda_pad_i~0.IN1
sda_pad_o <= i2c_master_byte_ctrl:byte_controller.sda_o
sda_padoen_o <= i2c_master_byte_ctrl:byte_controller.sda_oen


|i2c_master_top|i2c_master_byte_ctrl:byte_controller
clk => clk~0.IN1
rst => rst~0.IN1
nReset => nReset~0.IN1
ena => ena~0.IN1
clk_cnt[0] => clk_cnt[0]~15.IN1
clk_cnt[1] => clk_cnt[1]~14.IN1
clk_cnt[2] => clk_cnt[2]~13.IN1
clk_cnt[3] => clk_cnt[3]~12.IN1
clk_cnt[4] => clk_cnt[4]~11.IN1
clk_cnt[5] => clk_cnt[5]~10.IN1
clk_cnt[6] => clk_cnt[6]~9.IN1
clk_cnt[7] => clk_cnt[7]~8.IN1
clk_cnt[8] => clk_cnt[8]~7.IN1
clk_cnt[9] => clk_cnt[9]~6.IN1
clk_cnt[10] => clk_cnt[10]~5.IN1
clk_cnt[11] => clk_cnt[11]~4.IN1
clk_cnt[12] => clk_cnt[12]~3.IN1
clk_cnt[13] => clk_cnt[13]~2.IN1
clk_cnt[14] => clk_cnt[14]~1.IN1
clk_cnt[15] => clk_cnt[15]~0.IN1
start => c_state~4.DATAB
start => core_cmd~5.OUTPUTSELECT
start => core_cmd~6.OUTPUTSELECT
start => core_cmd~10.DATAB
start => cmd_ack~1.OUTPUTSELECT
stop => go~1.IN1
stop => c_state~17.DATAB
stop => core_cmd~21.DATAB
stop => c_state~18.DATAB
read => go~0.IN0
read => core_cmd~5.DATAA
read => core_cmd~4.OUTPUTSELECT
read => cmd_ack~0.OUTPUTSELECT
read => c_state~9.DATAB
read => core_cmd~11.DATAB
read => core_cmd~12.DATAB
read => c_state~8.DATAB
write => go~0.IN1
write => core_cmd~4.DATAA
write => cmd_ack~0.DATAA
ack_in => core_txd~0.DATAB
ack_in => core_txd~1.DATAA
din[0] => sr~15.DATAB
din[1] => sr~14.DATAB
din[2] => sr~13.DATAB
din[3] => sr~12.DATAB
din[4] => sr~11.DATAB
din[5] => sr~10.DATAB
din[6] => sr~9.DATAB
din[7] => sr~8.DATAB
cmd_ack <= cmd_ack~reg0.DB_MAX_OUTPUT_PORT_TYPE
ack_out <= ack_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
dout[0] <= sr[0].DB_MAX_OUTPUT_PORT_TYPE
dout[1] <= sr[1].DB_MAX_OUTPUT_PORT_TYPE
dout[2] <= sr[2].DB_MAX_OUTPUT_PORT_TYPE
dout[3] <= sr[3].DB_MAX_OUTPUT_PORT_TYPE
dout[4] <= sr[4].DB_MAX_OUTPUT_PORT_TYPE
dout[5] <= sr[5].DB_MAX_OUTPUT_PORT_TYPE
dout[6] <= sr[6].DB_MAX_OUTPUT_PORT_TYPE
dout[7] <= sr[7].DB_MAX_OUTPUT_PORT_TYPE
i2c_busy <= i2c_master_bit_ctrl:bit_controller.busy
i2c_al <= i2c_master_bit_ctrl:bit_controller.al
scl_i => scl_i~0.IN1
scl_o <= i2c_master_bit_ctrl:bit_controller.scl_o
scl_oen <= i2c_master_bit_ctrl:bit_controller.scl_oen
sda_i => sda_i~0.IN1
sda_o <= i2c_master_bit_ctrl:bit_controller.sda_o
sda_oen <= i2c_master_bit_ctrl:bit_controller.sda_oen


|i2c_master_top|i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller
clk => cnt[15].CLK
clk => cnt[14].CLK
clk => cnt[13].CLK
clk => cnt[12].CLK
clk => cnt[11].CLK
clk => cnt[10].CLK
clk => cnt[9].CLK
clk => cnt[8].CLK
clk => cnt[7].CLK
clk => cnt[6].CLK
clk => cnt[5].CLK
clk => cnt[4].CLK
clk => cnt[3].CLK
clk => cnt[2].CLK
clk => cnt[1].CLK
clk => cnt[0].CLK
clk => clk_en.CLK
clk => sSCL.CLK
clk => sSDA.CLK
clk => dSCL.CLK
clk => dSDA.CLK
clk => sta_condition.CLK
clk => sto_condition.CLK
clk => busy~reg0.CLK
clk => cmd_stop.CLK
clk => dcmd_stop.CLK
clk => al~reg0.CLK
clk => dout~reg0.CLK
clk => cmd_ack~reg0.CLK
clk => scl_oen~reg0.CLK
clk => sda_oen~reg0.CLK
clk => sda_chk.CLK
clk => dscl_oen.CLK
clk => c_state~40.IN1
rst => cnt~32.OUTPUTSELECT
rst => cnt~33.OUTPUTSELECT
rst => cnt~34.OUTPUTSELECT
rst => cnt~35.OUTPUTSELECT
rst => cnt~36.OUTPUTSELECT
rst => cnt~37.OUTPUTSELECT
rst => cnt~38.OUTPUTSELECT
rst => cnt~39.OUTPUTSELECT
rst => cnt~40.OUTPUTSELECT
rst => cnt~41.OUTPUTSELECT
rst => cnt~42.OUTPUTSELECT
rst => cnt~43.OUTPUTSELECT
rst => cnt~44.OUTPUTSELECT
rst => cnt~45.OUTPUTSELECT
rst => cnt~46.OUTPUTSELECT
rst => cnt~47.OUTPUTSELECT
rst => clk_en~1.OUTPUTSELECT
rst => sSCL~0.OUTPUTSELECT
rst => sSDA~0.OUTPUTSELECT
rst => dSCL~0.OUTPUTSELECT
rst => dSDA~0.OUTPUTSELECT
rst => sta_condition~2.OUTPUTSELECT
rst => sto_condition~2.OUTPUTSELECT
rst => busy~2.OUTPUTSELECT
rst => cmd_stop~0.OUTPUTSELECT
rst => dcmd_stop~0.OUTPUTSELECT
rst => al~4.OUTPUTSELECT
rst => always7~0.IN1
nReset => cmd_ack~reg0.ACLR
nReset => scl_oen~reg0.PRESET
nReset => sda_oen~reg0.PRESET
nReset => sda_chk.ACLR
nReset => busy~reg0.ACLR
nReset => dcmd_stop.ACLR
nReset => al~reg0.ACLR
nReset => cmd_stop.ACLR
nReset => cnt[14].ACLR
nReset => cnt[13].ACLR
nReset => cnt[12].ACLR
nReset => cnt[11].ACLR
nReset => cnt[10].ACLR
nReset => cnt[9].ACLR
nReset => cnt[8].ACLR
nReset => cnt[7].ACLR
nReset => cnt[6].ACLR
nReset => cnt[5].ACLR
nReset => cnt[4].ACLR
nReset => cnt[3].ACLR
nReset => cnt[2].ACLR
nReset => cnt[1].ACLR
nReset => cnt[0].ACLR
nReset => clk_en.PRESET
nReset => cnt[15].ACLR
nReset => sto_condition.ACLR
nReset => sta_condition.ACLR
nReset => sSDA.PRESET
nReset => dSCL.PRESET
nReset => dSDA.PRESET
nReset => sSCL.PRESET
nReset => c_state~41.IN1
clk_cnt[0] => cnt~15.DATAB
clk_cnt[1] => cnt~14.DATAB
clk_cnt[2] => cnt~13.DATAB
clk_cnt[3] => cnt~12.DATAB
clk_cnt[4] => cnt~11.DATAB
clk_cnt[5] => cnt~10.DATAB
clk_cnt[6] => cnt~9.DATAB
clk_cnt[7] => cnt~8.DATAB
clk_cnt[8] => cnt~7.DATAB
clk_cnt[9] => cnt~6.DATAB
clk_cnt[10] => cnt~5.DATAB
clk_cnt[11] => cnt~4.DATAB
clk_cnt[12] => cnt~3.DATAB
clk_cnt[13] => cnt~2.DATAB
clk_cnt[14] => cnt~1.DATAB
clk_cnt[15] => cnt~0.DATAB
ena => always1~0.IN1
cmd[0] => Equal~0.IN7
cmd[0] => Decoder~0.IN3
cmd[1] => Equal~0.IN6
cmd[1] => Decoder~0.IN2
cmd[2] => Equal~0.IN5
cmd[2] => Decoder~0.IN1
cmd[3] => Equal~0.IN4
cmd[3] => Decoder~0.IN0
cmd_ack <= cmd_ack~reg0.DB_MAX_OUTPUT_PORT_TYPE
busy <= busy~reg0.DB_MAX_OUTPUT_PORT_TYPE
al <= al~reg0.DB_MAX_OUTPUT_PORT_TYPE
din => Select~2.IN5
dout <= dout~reg0.DB_MAX_OUTPUT_PORT_TYPE
scl_i => sSCL~0.DATAA
scl_o <= <GND>
scl_oen <= scl_oen~reg0.DB_MAX_OUTPUT_PORT_TYPE
sda_i => sSDA~0.DATAA
sda_o <= <GND>
sda_oen <= sda_oen~reg0.DB_MAX_OUTPUT_PORT_TYPE