i2c_master_top.hif

verilog在cpld上实现i2c主从设备通讯功能

Version 5.1 Build 176 10/26/2005 SJ Full Version
37
2006
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
# entity
i2c_master_top
# storage
db|i2c_master_top.(0).cnf
db|i2c_master_top.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
i2c_master_top.v
2520e91e2ab6c625da9ad2cb3237426c
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ARST_LVL
0
PARAMETER_BIN
DEF
}
# include_file {
i2c_master_defines.v
cd29fd205fe652b841595b7bdac8d4cb
}
# hierarchies {
|
}
# end
# entity
i2c_master_byte_ctrl
# storage
db|i2c_master_top.(1).cnf
db|i2c_master_top.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
i2c_master_byte_ctrl.v
9f9dfde3ba970e88376f1c27ff83520
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ST_IDLE
00000
PARAMETER_BIN
DEF
ST_START
00001
PARAMETER_BIN
DEF
ST_READ
00010
PARAMETER_BIN
DEF
ST_WRITE
00100
PARAMETER_BIN
DEF
ST_ACK
01000
PARAMETER_BIN
DEF
ST_STOP
10000
PARAMETER_BIN
DEF
}
# include_file {
i2c_master_defines.v
cd29fd205fe652b841595b7bdac8d4cb
}
# hierarchies {
i2c_master_byte_ctrl:byte_controller
}
# end
# entity
i2c_master_bit_ctrl
# storage
db|i2c_master_top.(2).cnf
db|i2c_master_top.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
i2c_master_bit_ctrl.v
146211fbe6a7d5da7b4b63d5b3b4c86
7
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
idle
00000000000000000
PARAMETER_BIN
DEF
start_a
00000000000000001
PARAMETER_BIN
DEF
start_b
00000000000000010
PARAMETER_BIN
DEF
start_c
00000000000000100
PARAMETER_BIN
DEF
start_d
00000000000001000
PARAMETER_BIN
DEF
start_e
00000000000010000
PARAMETER_BIN
DEF
stop_a
00000000000100000
PARAMETER_BIN
DEF
stop_b
00000000001000000
PARAMETER_BIN
DEF
stop_c
00000000010000000
PARAMETER_BIN
DEF
stop_d
00000000100000000
PARAMETER_BIN
DEF
rd_a
00000001000000000
PARAMETER_BIN
DEF
rd_b
00000010000000000
PARAMETER_BIN
DEF
rd_c
00000100000000000
PARAMETER_BIN
DEF
rd_d
00001000000000000
PARAMETER_BIN
DEF
wr_a
00010000000000000
PARAMETER_BIN
DEF
wr_b
00100000000000000
PARAMETER_BIN
DEF
wr_c
01000000000000000
PARAMETER_BIN
DEF
wr_d
10000000000000000
PARAMETER_BIN
DEF
}
# include_file {
i2c_master_defines.v
cd29fd205fe652b841595b7bdac8d4cb
}
# hierarchies {
i2c_master_byte_ctrl:byte_controller|i2c_master_bit_ctrl:bit_controller
}
# end
# complete