swepfre.schbak

这是我的毕业设计

VERSION 6
BEGIN SCHEMATIC
    BEGIN ATTR DeviceFamilyName "virtex4"
        DELETE all:0
        EDITNAME all:0
        EDITTRAIT all:0
    END ATTR
    BEGIN NETLIST
        SIGNAL XLXN_2
        SIGNAL XLXN_3
        SIGNAL XLXN_4
        SIGNAL XLXN_5
        SIGNAL XLXN_7
        SIGNAL XLXN_10(31:0)
        SIGNAL XLXN_12(7:0)
        SIGNAL XLXN_13
        SIGNAL clk40
        SIGNAL sin_out(5:0)
        PORT Input clk40
        PORT Output sin_out(5:0)
        BEGIN BLOCKDEF ibufg
            TIMESTAMP 2001 2 2 12 37 45
            LINE N 64 0 64 -64 
            LINE N 128 -32 64 0 
            LINE N 64 -64 128 -32 
            LINE N 224 -32 128 -32 
            LINE N 0 -32 64 -32 
        END BLOCKDEF
        BEGIN BLOCKDEF dcm_160
            TIMESTAMP 2007 10 5 1 41 2
            RECTANGLE N 64 -192 320 0 
            LINE N 64 -160 0 -160 
            LINE N 64 -32 0 -32 
            LINE N 320 -160 384 -160 
            LINE N 320 -96 384 -96 
            LINE N 320 -32 384 -32 
        END BLOCKDEF
        BEGIN BLOCKDEF inv
            TIMESTAMP 2001 2 2 12 38 38
            LINE N 0 -32 64 -32 
            LINE N 224 -32 160 -32 
            LINE N 64 -64 128 -32 
            LINE N 128 -32 64 0 
            LINE N 64 0 64 -64 
            CIRCLE N 128 -48 160 -16 
        END BLOCKDEF
        BEGIN BLOCKDEF rst_gen
            TIMESTAMP 2007 10 5 1 44 35
            RECTANGLE N 64 -64 320 0 
            LINE N 64 -32 0 -32 
            LINE N 320 -32 384 -32 
        END BLOCKDEF
        BEGIN BLOCKDEF swep_fre
            TIMESTAMP 2007 10 5 6 7 24
            RECTANGLE N 64 -128 320 0 
            LINE N 64 -96 0 -96 
            LINE N 64 -32 0 -32 
            RECTANGLE N 320 -108 384 -84 
            LINE N 320 -96 384 -96 
        END BLOCKDEF
        BEGIN BLOCKDEF trunction
            TIMESTAMP 2007 10 5 1 29 0
            RECTANGLE N 64 -128 320 0 
            LINE N 64 -96 0 -96 
            RECTANGLE N 0 -44 64 -20 
            LINE N 64 -32 0 -32 
            RECTANGLE N 320 -108 384 -84 
            LINE N 320 -96 384 -96 
        END BLOCKDEF
        BEGIN BLOCKDEF findsin
            TIMESTAMP 2007 10 5 1 28 43
            RECTANGLE N 64 -128 320 0 
            LINE N 64 -96 0 -96 
            RECTANGLE N 0 -44 64 -20 
            LINE N 64 -32 0 -32 
            RECTANGLE N 320 -108 384 -84 
            LINE N 320 -96 384 -96 
        END BLOCKDEF
        BEGIN BLOCK XLXI_9 ibufg
            PIN I clk40
            PIN O XLXN_4
        END BLOCK
        BEGIN BLOCK XLXI_10 dcm_160
            PIN CLKIN_IN XLXN_4
            PIN RST_IN XLXN_2
            PIN LOCKED_OUT XLXN_5
            PIN CLKFX_OUT XLXN_13
            PIN CLK0_OUT
        END BLOCK
        BEGIN BLOCK XLXI_84 inv
            PIN I XLXN_5
            PIN O XLXN_7
        END BLOCK
        BEGIN BLOCK XLXI_85 rst_gen
            PIN clk XLXN_4
            PIN rst XLXN_3
        END BLOCK
        BEGIN BLOCK XLXI_86 swep_fre
            PIN clk XLXN_13
            PIN rst XLXN_7
            PIN accu_out(31:0) XLXN_10(31:0)
        END BLOCK
        BEGIN BLOCK XLXI_87 trunction
            PIN clk XLXN_13
            PIN phaseaddress(31:0) XLXN_10(31:0)
            PIN addresscutted(7:0) XLXN_12(7:0)
        END BLOCK
        BEGIN BLOCK XLXI_90 findsin
            PIN clk XLXN_13
            PIN addr(7:0) XLXN_12(7:0)
            PIN sinout(5:0) sin_out(5:0)
        END BLOCK
        BEGIN BLOCK XLXI_91 inv
            PIN I XLXN_3
            PIN O XLXN_2
        END BLOCK
    END NETLIST
    BEGIN SHEET 1 3520 2720
        BEGIN INSTANCE XLXI_10 544 416 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_85 560 128 R0
        END INSTANCE
        INSTANCE XLXI_9 208 288 R0
        BEGIN BRANCH XLXN_2
            WIRE 448 384 544 384
        END BRANCH
        INSTANCE XLXI_91 224 416 R0
        BEGIN BRANCH XLXN_3
            WIRE 160 384 224 384
            WIRE 160 384 160 496
            WIRE 160 496 1008 496
            WIRE 944 96 1008 96
            WIRE 1008 96 1008 496
        END BRANCH
        BEGIN BRANCH XLXN_4
            WIRE 432 256 464 256
            WIRE 464 256 544 256
            WIRE 464 96 560 96
            WIRE 464 96 464 256
        END BRANCH
        INSTANCE XLXI_84 1024 288 R0
        BEGIN BRANCH XLXN_5
            WIRE 928 256 1024 256
        END BRANCH
        BEGIN INSTANCE XLXI_87 1744 400 R0
        END INSTANCE
        BEGIN INSTANCE XLXI_86 1296 416 R0
        END INSTANCE
        BEGIN BRANCH XLXN_7
            WIRE 1248 256 1264 256
            WIRE 1264 256 1264 384
            WIRE 1264 384 1280 384
            WIRE 1280 384 1296 384
        END BRANCH
        BEGIN BRANCH XLXN_10(31:0)
            WIRE 1680 320 1712 320
            WIRE 1712 320 1712 368
            WIRE 1712 368 1744 368
        END BRANCH
        BEGIN BRANCH XLXN_12(7:0)
            WIRE 2128 304 2144 304
            WIRE 2144 304 2144 400
            WIRE 2144 400 2256 400
        END BRANCH
        BEGIN BRANCH XLXN_13
            WIRE 928 320 1232 320
            WIRE 1232 320 1232 464
            WIRE 1232 464 1728 464
            WIRE 1232 320 1296 320
            WIRE 1728 256 1728 304
            WIRE 1728 304 1728 464
            WIRE 1728 304 1744 304
            WIRE 1728 256 2208 256
            WIRE 2208 256 2208 336
            WIRE 2208 336 2256 336
        END BRANCH
        BEGIN BRANCH clk40
            WIRE 176 256 208 256
        END BRANCH
        IOMARKER 176 256 clk40 R180 28
        BEGIN BRANCH sin_out(5:0)
            WIRE 2640 336 2656 336
            WIRE 2656 336 2672 336
        END BRANCH
        BEGIN INSTANCE XLXI_90 2256 432 R0
        END INSTANCE
        IOMARKER 2672 336 sin_out(5:0) R0 28
    END SHEET
END SCHEMATIC