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*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Package <sincos> compiled.
Compiling vhdl file "D:/rfid/rfid_re/findsin.vhd" in Library work.
Entity <findsin> compiled.
Entity <findsin> (Architecture <Behavioral>) compiled.


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Started process "Check Syntax".


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Compiling vhdl file "D:/rfid/rfid_re/findcos.vhd" in Library work.
Entity <findcos> compiled.
Entity <findcos> (Architecture <Behavioral>) compiled.


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Started process "Create Schematic Symbol".

Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Package <sincos> compiled.
Compiling vhdl file "D:/rfid/rfid_re/findcos.vhd" in Library work.
Entity <findcos> compiled.
Entity <findcos> (Architecture <Behavioral>) compiled.
tdtfi(vhdl) completed successfully.






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Started process "Create Schematic Symbol".

Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Package <sincos> compiled.
Compiling vhdl file "D:/rfid/rfid_re/findsin.vhd" in Library work.
Entity <findsin> compiled.
Entity <findsin> (Architecture <Behavioral>) compiled.
tdtfi(vhdl) completed successfully.






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Project Navigator Auto-Make Log File
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Started process "Create Schematic Symbol".

Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Package <sincos> compiled.
Compiling vhdl file "D:/rfid/rfid_re/trunction.vhd" in Library work.
Entity <trunction> compiled.
Entity <trunction> (Architecture <Behavioral>) compiled.
tdtfi(vhdl) completed successfully.






Project Navigator Auto-Make Log File
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Started process "Check Syntax".


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.


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Started process "Create Schematic Symbol".

xaw2spl: Completed successfully





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Started process "Create Schematic Symbol".

Compiling vhdl file "D:/rfid/rfid_re/rst_gen.vhd" in Library work.
Entity <rst_gen> compiled.
Entity <rst_gen> (Architecture <Behavioral>) compiled.
tdtfi(vhdl) completed successfully.






Project Navigator Auto-Make Log File
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Started process "Check Syntax".


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "D:/rfid/rfid_re/rst_gen.vhd" in Library work.
Entity <rst_gen> compiled.
Entity <rst_gen> (Architecture <Behavioral>) compiled.


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Started process "View HDL Functional Model".

DRC Check completed: No Error found.
Vhdl netlist file generated.




Started process "View HDL Source".

xaw2vhdl: Completed successfully










Started process "Synthesize".


=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "D:/rfid/rfid_re/sincos.vhd" in Library work.
Compiling vhdl file "D:/rfid/rfid_re/dcm_160.vhd" in Library work.
Entity <dcm_160> compiled.
Entity <dcm_160> (Architecture <BEHAVIORAL>) compiled.
Compiling vhdl file "D:/rfid/rfid_re/rst_gen.vhd" in Library work.
Architecture behavioral of Entity rst_gen is up to date.
Compiling vhdl file "D:/rfid/rfid_re/swep_fre.vhd" in Library work.
Entity <swep_fre> compiled.
Entity <swep_fre> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/rfid/rfid_re/trunction.vhd" in Library work.
Entity <trunction> compiled.
Entity <trunction> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/rfid/rfid_re/findsin.vhd" in Library work.
Architecture behavioral of Entity findsin is up to date.
Compiling vhdl file "D:/rfid/rfid_re/swepfre.vhf" in Library work.
Entity <swepfre> compiled.
Entity <swepfre> (Architecture <BEHAVIORAL>) compiled.

=========================================================================
*                            HDL Analysis                               *
=========================================================================
Analyzing Entity <swepfre> (Architecture <BEHAVIORAL>).
    Set user-defined property "IOSTANDARD =  LVCMOS25" for instance <XLXI_9> in unit <swepfre>.
    Set user-defined property "CAPACITANCE =  DONT_CARE" for instance <XLXI_9> in unit <swepfre>.
WARNING:Xst:753 - "D:/rfid/rfid_re/swepfre.vhf" line 98: Unconnected output port 'CLK0_OUT' of component 'dcm_160'.
Entity <swepfre> analyzed. Unit <swepfre> generated.

Analyzing Entity <dcm_160> (Architecture <behavioral>).
WARNING:Xst:766 - "D:/rfid/rfid_re/dcm_160.vhd" line 99: Generating a Black Box for component <BUFG>.
WARNING:Xst:766 - "D:/rfid/rfid_re/dcm_160.vhd" line 103: Generating a Black Box for component <BUFG>.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLK90' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLK180' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLK270' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLKDV' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLK2X' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLK2X180' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'CLKFX180' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'DRDY' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'DO' of component 'DCM_ADV'.
WARNING:Xst:753 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Unconnected output port 'PSDONE' of component 'DCM_ADV'.
WARNING:Xst:766 - "D:/rfid/rfid_re/dcm_160.vhd" line 107: Generating a Black Box for component <DCM_ADV>.
Entity <dcm_160> analyzed. Unit <dcm_160> generated.

Analyzing Entity <rst_gen> (Architecture <behavioral>).
Entity <rst_gen> analyzed. Unit <rst_gen> generated.

Analyzing Entity <swep_fre> (Architecture <behavioral>).
WARNING:Xst:819 - "D:/rfid/rfid_re/swep_fre.vhd" line 48: The following signals are missing in the process sensitivity list:
   fre_begin.
Entity <swep_fre> analyzed. Unit <swep_fre> generated.

Analyzing Entity <trunction> (Architecture <behavioral>).
Entity <trunction> analyzed. Unit <trunction> generated.

Analyzing Entity <findsin> (Architecture <behavioral>).
Entity <findsin> analyzed. Unit <findsin> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <findsin>.
    Related source file is "D:/rfid/rfid_re/findsin.vhd".
    Found 256x6-bit ROM for signal <$n0001> created at line 46.
    Found 6-bit register for signal <sinout>.
    Summary:
	inferred   1 ROM(s).
	inferred   6 D-type flip-flop(s).
Unit <findsin> synthesized.


Synthesizing Unit <trunction>.
    Related source file is "D:/rfid/rfid_re/trunction.vhd".
WARNING:Xst:647 - Input <phaseaddress<23:0>> is never used.
    Found 8-bit register for signal <addresscutted>.
    Summary:
	inferred   8 D-type flip-flop(s).
Unit <trunction> synthesized.


Synthesizing Unit <swep_fre>.
    Related source file is "D:/rfid/rfid_re/swep_fre.vhd".
WARNING:Xst:653 - Signal <fre_begin> is used but never assigned. Tied to value 00001000000000000000000000000000.
WARNING:Xst:653 - Signal <fre_step> is used but never assigned. Tied to value 00000000010000000000000000000000.
    Found 32-bit adder for signal <$n0001> created at line 59.
    Found 11-bit up counter for signal <cnt>.
    Found 32-bit register for signal <fre_word>.
    Found 32-bit up accumulator for signal <mid_result>.
    Summary:
	inferred   1 Counter(s).
	inferred   1 Accumulator(s).
	inferred  32 D-type flip-flop(s).
	inferred   1 Adder/Subtractor(s).
Unit <swep_fre> synthesized.


Synthesizing Unit <rst_gen>.
    Related source file is "D:/rfid/rfid_re/rst_gen.vhd".
    Found 1-bit register for signal <rst>.
    Found 5-bit up counter for signal <count>.
    Summary:
	inferred   1 Counter(s).
	inferred   1 D-type flip-flop(s).
Unit <rst_gen> synthesized.


Synthesizing Unit <dcm_160>.
    Related source file is "D:/rfid/rfid_re/dcm_160.vhd".
Unit <dcm_160> synthesized.


Synthesizing Unit <swepfre>.
    Related source file is "D:/rfid/rfid_re/swepfre.vhf".
Unit <swepfre> synthesized.


=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Advanced RAM inference ...
INFO:Xst:1647 - Data output of ROM <Mrom__n0001> in block <findsin> is tied to register <sinout> in block <findsin>.
INFO:Xst:1650 - The register is removed and the ROM is implemented as read-only block RAM.
MAC inference ...
Advanced multiplier inference ...
Advanced Registered AddSub inference ...
DSP optimizations ...
Dynamic shift register inference ...

=========================================================================
HDL Synthesis Report

Macro Statistics
# Block RAMs                       : 1
 256x6-bit single-port block RAM   : 1
# Adders/Subtractors               : 1
 32-bit adder                      : 1
# Counters                         : 1
 5-bit up counter                  : 1
# Accumulators                     : 1
 32-bit up accumulator             : 1
# Registers                        : 34
 1-bit register                    : 33
 8-bit register                    : 1

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
WARNING:Xst:1426 - The value init of the FF/Latch rst hinder the constant cleaning in the block rst_gen.
   You should achieve better results by setting this init to 1.
Loading device for application Rf_Device from file '4vsx55.nph' in environment C:/Xilinx.
WARNING:Xst:1426 - The value init of the FF/Latch fre_word_27 hinder the constant cleaning in the block swep_fre.
   You should achieve better results by setting this init to 1.
WARNING:Xst:1293 - FF/Latch  <fre_word_4> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_5> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_6> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_7> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_8> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_9> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_10> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_11> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_12> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_13> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_14> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_15> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_16> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_17> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_18> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_19> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_20> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_21> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_23> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_24> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_25> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_26> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_28> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_29> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_30> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_31> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_3> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_2> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_1> has a constant value of 0 in block <swep_fre>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <fre_word_0> has a constant value of 0 in block <swep_fre>.

Optimizing unit <swepfre> ...

Optimizing unit <rst_gen> ...

Optimizing unit <swep_fre> ...

Mapping all equations...
Building and optimizing final netlist ...
Found area constraint ratio of 100 (+ 5) on block swepfre, actual ratio is 0.

=========================================================================
*                            Final Report                               *
=========================================================================

Device utilization summary:
---------------------------

Selected Device : 4vsx55ff1148-11 

 Number of Slices:                      10  out of  24576     0%  
 Number of Slice Flip Flops:            16  out of  49152     0%  
 Number of 4 input LUTs:                 7  out of  49152     0%  
 Number of bonded IOBs:                  7  out of    642     1%  
 Number of FIFO16/RAMB16s:               1  out of    320     0%  
    Number used as RAMB16s:              1