transcript

这是我的毕业设计

# Reading D:/programfiles/modelsim/tcl/vsim/pref.tcl 
# reading D:\programfiles\modelsim\win32/../modelsim.ini
# reading modelsim.ini
# //  ModelSim SE 6.0 Aug 19 2004 
# //
# //  Copyright Mentor Graphics Corporation 2004
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# do swepfre_swepfre_sch_tb.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package numeric_std
# -- Loading package vcomponents
# -- Compiling entity dcm_160
# -- Compiling architecture behavioral of dcm_160
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity rst_gen
# -- Compiling architecture behavioral of rst_gen
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity swep_fre
# -- Compiling architecture behavioral of swep_fre
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling package sincos
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package sincos
# -- Compiling entity trunction
# -- Compiling architecture behavioral of trunction
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package sincos
# -- Compiling entity findsin
# -- Compiling architecture behavioral of findsin
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package numeric_std
# -- Loading package vcomponents
# -- Compiling entity swepfre
# -- Compiling architecture behavioral of swepfre
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package numeric_std
# -- Loading package vcomponents
# -- Compiling entity swepfre_swepfre_sch_tb
# -- Compiling architecture behavioral of swepfre_swepfre_sch_tb
# ** Warning: [4] sweptest.vhd(38): A space is required between a number and an identifier.
# vsim -lib work -t 1ps swepfre_swepfre_sch_tb 
# Loading D:\programfiles\modelsim\win32/../std.standard
# Loading D:\programfiles\modelsim\win32/../ieee.std_logic_1164(body)
# Loading D:\programfiles\modelsim\win32/../ieee.numeric_std(body)
# Loading C:\Xilinx\vhdl\mti_se\unisim.vcomponents
# Loading work.swepfre_swepfre_sch_tb(behavioral)
# Loading work.swepfre(behavioral)
# Loading C:\Xilinx\vhdl\mti_se\unisim.ibufg(ibufg_v)
# Loading work.dcm_160(behavioral)
# Loading C:\Xilinx\vhdl\mti_se\unisim.bufg(bufg_v)
# Loading D:\programfiles\modelsim\win32/../std.textio(body)
# Loading D:\programfiles\modelsim\win32/../ieee.vital_timing(body)
# Loading D:\programfiles\modelsim\win32/../ieee.vital_primitives(body)
# Loading C:\Xilinx\vhdl\mti_se\unisim.vpkg(body)
# Loading C:\Xilinx\vhdl\mti_se\unisim.dcm_adv(dcm_adv_v)
# Loading C:\Xilinx\vhdl\mti_se\unisim.dcm_adv_clock_divide_by_2(dcm_adv_clock_divide_by_2_v)
# Loading C:\Xilinx\vhdl\mti_se\unisim.dcm_adv_maximum_period_check(dcm_adv_maximum_period_check_v)
# Loading C:\Xilinx\vhdl\mti_se\unisim.dcm_adv_clock_lost(dcm_adv_clock_lost_v)
# Loading C:\Xilinx\vhdl\mti_se\unisim.inv(inv_v)
# Loading D:\programfiles\modelsim\win32/../ieee.std_logic_arith(body)
# Loading D:\programfiles\modelsim\win32/../ieee.std_logic_unsigned(body)
# Loading work.rst_gen(behavioral)
# Loading work.swep_fre(behavioral)
# Loading work.sincos
# Loading work.trunction(behavioral)
# Loading work.findsin(behavioral)
# .wave
# .main_pane.workspace
# .main_pane.signals.interior.cs
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
#    Time: 525 ns  Iteration: 3  Instance: /swepfre_swepfre_sch_tb/uut/xlxi_90
# ** Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0.
#    Time: 525 ns  Iteration: 3  Instance: /swepfre_swepfre_sch_tb/uut/xlxi_90
run 22us