uart.map.eqn

VHDL编写的异步通信串行口设计用Quartus工具编译

F11_dffs[3]_lut_out = Di[3];
F11_dffs[3] = DFFEA(F11_dffs[3]_lut_out, !P5_cout, !RESET, , , , );


--F11_dffs[2] is UARTCTRL:inst3|lpm_dff:$00012|dffs[2]
--operation mode is normal

F11_dffs[2]_lut_out = Di[2];
F11_dffs[2] = DFFEA(F11_dffs[2]_lut_out, !P5_cout, !RESET, , , , );


--F11_dffs[1] is UARTCTRL:inst3|lpm_dff:$00012|dffs[1]
--operation mode is normal

F11_dffs[1]_lut_out = Di[1];
F11_dffs[1] = DFFEA(F11_dffs[1]_lut_out, !P5_cout, !RESET, , , , );


--F11_dffs[0] is UARTCTRL:inst3|lpm_dff:$00012|dffs[0]
--operation mode is normal

F11_dffs[0]_lut_out = Di[0];
F11_dffs[0] = DFFEA(F11_dffs[0]_lut_out, !P5_cout, !RESET, , , , );


--C1L11Q is TX:5|Txss~34
--operation mode is normal

C1L11Q_lut_out = P4_safe_q[4] & C1L01Q & C1L6;
C1L11Q = DFFEA(C1L11Q_lut_out, CLK, !RESET, , , , );


--C1L21Q is TX:5|Txss~37
--operation mode is normal

C1L21Q_lut_out = C1L11Q # C1L21Q & (P4_safe_q[4] # !C1L6);
C1L21Q = DFFEA(C1L21Q_lut_out, CLK, !RESET, , , , );


--C1L61 is TX:5|XOUT[2]~1
--operation mode is normal

C1L61 = C1L11Q # C1L21Q;


--C1L9Q is TX:5|Txss~32
--operation mode is normal

C1L9Q_lut_out = C1L8Q # C1L9Q & (P4_safe_q[4] # !C1L6);
C1L9Q = DFFEA(C1L9Q_lut_out, CLK, !RESET, , , , );


--C1L01Q is TX:5|Txss~33
--operation mode is normal

C1L01Q_lut_out = C1L01Q & (!P4_safe_q[4] # !C1L6) # !C1L01Q & C1L9Q & C1L6 & !P4_safe_q[4];
C1L01Q = DFFEA(C1L01Q_lut_out, CLK, !RESET, , , , );


--C1L51 is TX:5|XOUT[1]~2
--operation mode is normal

C1L51 = C1L21Q # C1L9Q # C1L01Q;


--C1L8Q is TX:5|Txss~31
--operation mode is normal

C1L8Q_lut_out = F8_dffs[0] & !C1L7Q;
C1L8Q = DFFEA(C1L8Q_lut_out, CLK, !RESET, , , , );


--C1L41 is TX:5|XOUT[0]~3
--operation mode is normal

C1L41 = C1L21Q # C1L01Q # C1L8Q;


--B1L31Q is Rx:4|Rxss~40
--operation mode is normal

B1L31Q_lut_out = F4_dffs[0] & (B1L21Q # B1L7Q & !Q1_SYNC);
B1L31Q = DFFEA(B1L31Q_lut_out, CLK, !RESET, , , , );


--R1_FF[0] is TX:5|ShiftReg:$00007|FF[0]
--operation mode is normal

R1_FF[0]_lut_out = R1_FF[1];
R1_FF[0] = DFFEA(R1_FF[0]_lut_out, F6_dffs[0], !RESET, , C1L01Q, F11_dffs[0], !C1L7Q);


--F6_dffs[0] is TX:5|lpm_dff:$00003|dffs[0]
--operation mode is normal

F6_dffs[0]_lut_out = !F6_dffs[0];
F6_dffs[0] = DFFEA(F6_dffs[0]_lut_out, F01_dffs[0], !C1L3, , , , );


--C1L7Q is TX:5|Txss~30
--operation mode is normal

C1L7Q_lut_out = !C1L31Q & (C1L7Q # F8_dffs[0]);
C1L7Q = DFFEA(C1L7Q_lut_out, CLK, !RESET, , , , );


--C1L5 is TX:5|_~210
--operation mode is normal

C1L5 = RESET # !C1L7Q;


--C1L1 is TX:5|_~24
--operation mode is normal

C1L1 = E1L3Q # RESET;


--E1L2Q is UARTCTRL:inst3|TxWrss~31
--operation mode is normal

E1L2Q_lut_out = P5_cout & !F31_dffs[0] & (E1L2Q # !E1L1Q);
E1L2Q = DFFEA(E1L2Q_lut_out, CLK, !RESET, , , , );


--C1L6 is TX:5|_~211
--operation mode is normal

C1L6 = P4_safe_q[1] & !P4_safe_q[3] & !P4_safe_q[2] & !P4_safe_q[0];


--F3_dffs[0] is Rx:4|lpm_dff:$00005|dffs[0]
--operation mode is normal

F3_dffs[0]_lut_out = !Q1_SYNC;
F3_dffs[0] = DFFEA(F3_dffs[0]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[1] is Rx:4|lpm_dff:$00005|dffs[1]
--operation mode is normal

F3_dffs[1]_lut_out = F3_dffs[0];
F3_dffs[1] = DFFEA(F3_dffs[1]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[2] is Rx:4|lpm_dff:$00005|dffs[2]
--operation mode is normal

F3_dffs[2]_lut_out = F3_dffs[1];
F3_dffs[2] = DFFEA(F3_dffs[2]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[3] is Rx:4|lpm_dff:$00005|dffs[3]
--operation mode is normal

F3_dffs[3]_lut_out = F3_dffs[2];
F3_dffs[3] = DFFEA(F3_dffs[3]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[4] is Rx:4|lpm_dff:$00005|dffs[4]
--operation mode is normal

F3_dffs[4]_lut_out = F3_dffs[3];
F3_dffs[4] = DFFEA(F3_dffs[4]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[5] is Rx:4|lpm_dff:$00005|dffs[5]
--operation mode is normal

F3_dffs[5]_lut_out = F3_dffs[4];
F3_dffs[5] = DFFEA(F3_dffs[5]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[6] is Rx:4|lpm_dff:$00005|dffs[6]
--operation mode is normal

F3_dffs[6]_lut_out = F3_dffs[5];
F3_dffs[6] = DFFEA(F3_dffs[6]_lut_out, CLK, !B1L1, , B1L5, , );


--F3_dffs[7] is Rx:4|lpm_dff:$00005|dffs[7]
--operation mode is normal

F3_dffs[7]_lut_out = F3_dffs[6];
F3_dffs[7] = DFFEA(F3_dffs[7]_lut_out, CLK, !B1L1, , B1L5, , );


--F8_dffs[0] is TX:5|lpm_dff:$00015|dffs[0]
--operation mode is normal

F8_dffs[0]_lut_out = VCC;
F8_dffs[0] = DFFEA(F8_dffs[0]_lut_out, GND, !C1L2, , , VCC, E1L3Q);


--F4_dffs[0] is Rx:4|lpm_dff:$00009|dffs[0]
--operation mode is normal

F4_dffs[0]_lut_out = !F4_dffs[0];
F4_dffs[0] = DFFEA(F4_dffs[0]_lut_out, F5_dffs[0], !B1L1, , , , );


--B1L21Q is Rx:4|Rxss~37
--operation mode is normal

B1L21Q_lut_out = B1L11Q # B1L21Q & !F4_dffs[0];
B1L21Q = DFFEA(B1L21Q_lut_out, CLK, !RESET, , , , );


--B1L7Q is Rx:4|Rxss~31
--operation mode is normal

B1L7Q_lut_out = B1L7Q & (Q1_SYNC & !B1L6Q # !F4_dffs[0]) # !B1L7Q & Q1_SYNC & !B1L6Q;
B1L7Q = DFFEA(B1L7Q_lut_out, CLK, !RESET, , , , );


--Q1_SYNC is Rx:4|Filterx:$00011|filt_tpl:$00000|SYNC
--operation mode is normal

Q1_SYNC_lut_out = Q1_FF[2];
Q1_SYNC = DFFEA(Q1_SYNC_lut_out, CLK, !RESET, , Q1L6, , );


--R1_FF[1] is TX:5|ShiftReg:$00007|FF[1]
--operation mode is normal

R1_FF[1]_lut_out = R1_FF[2];
R1_FF[1] = DFFEA(R1_FF[1]_lut_out, F6_dffs[0], !RESET, , C1L01Q, F11_dffs[1], !C1L7Q);


--F01_dffs[0] is TX:5|clk_pdiv:$00001|lpm_dff:$00004|dffs[0]
--operation mode is normal

F01_dffs[0]_lut_out = N43L1;
F01_dffs[0] = DFFEA(F01_dffs[0]_lut_out, CLK, VCC, , , , );


--E1L1Q is UARTCTRL:inst3|TxWrss~30
--operation mode is normal

E1L1Q_lut_out = !E1L3Q & (E1L1Q # !F31_dffs[0] & P5_cout);
E1L1Q = DFFEA(E1L1Q_lut_out, CLK, !RESET, , , , );


--B1L6Q is Rx:4|Rxss~30
--operation mode is normal

B1L6Q_lut_out = !B1L31Q & (Q1_SYNC # B1L6Q);
B1L6Q = DFFEA(B1L6Q_lut_out, CLK, !RESET, , , , );


--B1L1 is Rx:4|_~42
--operation mode is normal

B1L1 = RESET # !B1L6Q;


--B1L8Q is Rx:4|Rxss~32
--operation mode is normal

B1L8Q_lut_out = !F4_dffs[0] & (B1L8Q # B1L9Q & !B1L2);
B1L8Q = DFFEA(B1L8Q_lut_out, CLK, !RESET, , , , );


--B1L5 is Rx:4|RxCNTe~0
--operation mode is normal

B1L5 = F4_dffs[0] & B1L8Q;


--C1L2 is TX:5|_~25
--operation mode is normal

C1L2 = C1L8Q # RESET;


--F5_dffs[0] is Rx:4|clk_pdiv:$00007|lpm_dff:$00004|dffs[0]
--operation mode is normal

F5_dffs[0]_lut_out = N71L1;
F5_dffs[0] = DFFEA(F5_dffs[0]_lut_out, CLK, VCC, , , , );


--B1L11Q is Rx:4|Rxss~35
--operation mode is normal

B1L11Q_lut_out = B1L01Q & !F4_dffs[0];
B1L11Q = DFFEA(B1L11Q_lut_out, CLK, !RESET, , , , );


--Q1_FF[2] is Rx:4|Filterx:$00011|filt_tpl:$00000|FF[2]
--operation mode is normal

Q1_FF[2]_lut_out = Q1_FF[1];
Q1_FF[2] = DFFEA(Q1_FF[2]_lut_out, CLK, !RESET, , , , );


--Q1_FF[1] is Rx:4|Filterx:$00011|filt_tpl:$00000|FF[1]
--operation mode is normal

Q1_FF[1]_lut_out = Q1_FF[0];
Q1_FF[1] = DFFEA(Q1_FF[1]_lut_out, CLK, !RESET, , , , );


--Q1_FF[0] is Rx:4|Filterx:$00011|filt_tpl:$00000|FF[0]
--operation mode is normal

Q1_FF[0]_lut_out = !Rx;
Q1_FF[0] = DFFEA(Q1_FF[0]_lut_out, CLK, !RESET, , , , );


--Q1L6 is Rx:4|Filterx:$00011|filt_tpl:$00000|SYNC~38
--operation mode is normal

Q1L6 = Q1_FF[2] & Q1_FF[1] & Q1_FF[0] # !Q1_FF[2] & !Q1_FF[1] & !Q1_FF[0];


--R1_FF[2] is TX:5|ShiftReg:$00007|FF[2]
--operation mode is normal

R1_FF[2]_lut_out = R1_FF[3];
R1_FF[2] = DFFEA(R1_FF[2]_lut_out, F6_dffs[0], !RESET, , C1L01Q, F11_dffs[2], !C1L7Q);


--N43L2 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~124
--operation mode is normal

N43L2 = P3_safe_q[3] & P3_safe_q[2] & !P3_safe_q[4] & !P3_safe_q[1];


--N43L3 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~125
--operation mode is normal

N43L3 = !P3_safe_q[8] & !P3_safe_q[7] & !P3_safe_q[6] & !P3_safe_q[5];


--N43L4 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~126
--operation mode is normal

N43L4 = !P3_safe_q[12] & !P3_safe_q[11] & !P3_safe_q[10] & !P3_safe_q[9];


--N43L5 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~127
--operation mode is normal

N43L5 = !P3_safe_q[16] & !P3_safe_q[15] & !P3_safe_q[14] & !P3_safe_q[13];


--N43L6 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~128
--operation mode is normal

N43L6 = N43L2 & N43L3 & N43L4 & N43L5;


--N43L1 is TX:5|clk_pdiv:$00001|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~0
--operation mode is normal

N43L1 = N43L6 & !P3_safe_q[0];


--B1L9Q is Rx:4|Rxss~33
--operation mode is normal

B1L9Q_lut_out = F4_dffs[0] & (B1L8Q # B1L4 # B1L3);
B1L9Q = DFFEA(B1L9Q_lut_out, CLK, !RESET, , , , );


--B1L2 is Rx:4|_~336
--operation mode is normal

B1L2 = P2_safe_q[3] & !P2_safe_q[2] & !P2_safe_q[1] & !P2_safe_q[0];


--B1L3 is Rx:4|_~337
--operation mode is normal

B1L3 = B1L9Q & !B1L2;


--N71L2 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~124
--operation mode is normal

N71L2 = P1_safe_q[3] & P1_safe_q[2] & !P1_safe_q[4] & !P1_safe_q[1];


--N71L3 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~125
--operation mode is normal

N71L3 = !P1_safe_q[8] & !P1_safe_q[7] & !P1_safe_q[6] & !P1_safe_q[5];


--N71L4 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~126
--operation mode is normal

N71L4 = !P1_safe_q[12] & !P1_safe_q[11] & !P1_safe_q[10] & !P1_safe_q[9];


--N71L5 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~127
--operation mode is normal

N71L5 = !P1_safe_q[16] & !P1_safe_q[15] & !P1_safe_q[14] & !P1_safe_q[13];


--N71L6 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~128
--operation mode is normal

N71L6 = N71L2 & N71L3 & N71L4 & N71L5;


--N71L1 is Rx:4|clk_pdiv:$00007|lpm_compare:$00000|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out~0
--operation mode is normal

N71L1 = N71L6 & !P1_safe_q[0];


--B1L01Q is Rx:4|Rxss~34
--operation mode is normal

B1L01Q_lut_out = F4_dffs[0] & (B1L01Q # B1L9Q & B1L2) # !F4_dffs[0] & B1L9Q & B1L2;
B1L01Q = DFFEA(B1L01Q_lut_out, CLK, !RESET, , , , );


--R1_FF[3] is TX:5|ShiftReg:$00007|FF[3]
--operation mode is normal

R1_FF[3]_lut_out = R1_FF[4];
R1_FF[3] = DFFEA(R1_FF[3]_lut_out, F6_dffs[0], !RESET, , C1L01Q, F11_dffs[3], !C1L7Q);


--B1L4 is Rx:4|_~338
--operation mode is normal

B1L4 = B1L7Q & Q1_SYNC;