standard.jdi

nois 2cpu 硬件实现编程

        <port name="trc_im_addr[2]" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_im_addr[2]"/>
        <port name="trc_im_addr[3]" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_im_addr[3]"/>
        <port name="trc_im_addr[4]" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_im_addr[4]"/>
        <port name="trc_im_addr[5]" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_im_addr[5]"/>
        <port name="trc_im_addr[6]" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_im_addr[6]"/>
        <port name="trc_on" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_on"/>
        <port name="trc_wrap" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trc_wrap"/>
        <port name="trigbrktype" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trigbrktype"/>
        <port name="trigger_state_1" source="std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|trigger_state_1"/>
        <port name="update" source="altera_internal_jtag"/>
        <port name="usr1" source="sld_hub:sld_hub_inst|jtag_debug_mode_usr1"/>
      </inputs>
      <outputs>
        <port name="ir_out[0]"/>
        <port name="ir_out[1]"/>
        <port name="irq"/>
        <port name="jdo[0]"/>
        <port name="jdo[1]"/>
        <port name="jdo[2]"/>
        <port name="jdo[3]"/>
        <port name="jdo[4]"/>
        <port name="jdo[5]"/>
        <port name="jdo[6]"/>
        <port name="jdo[7]"/>
        <port name="jdo[8]"/>
        <port name="jdo[9]"/>
        <port name="jdo[10]"/>
        <port name="jdo[11]"/>
        <port name="jdo[12]"/>
        <port name="jdo[13]"/>
        <port name="jdo[14]"/>
        <port name="jdo[15]"/>
        <port name="jdo[16]"/>
        <port name="jdo[17]"/>
        <port name="jdo[18]"/>
        <port name="jdo[19]"/>
        <port name="jdo[20]"/>
        <port name="jdo[21]"/>
        <port name="jdo[22]"/>
        <port name="jdo[23]"/>
        <port name="jdo[24]"/>
        <port name="jdo[25]"/>
        <port name="jdo[26]"/>
        <port name="jdo[27]"/>
        <port name="jdo[28]"/>
        <port name="jdo[29]"/>
        <port name="jdo[30]"/>
        <port name="jdo[31]"/>
        <port name="jdo[32]"/>
        <port name="jdo[33]"/>
        <port name="jdo[34]"/>
        <port name="jdo[35]"/>
        <port name="jdo[36]"/>
        <port name="jdo[37]"/>
        <port name="jrst_n"/>
        <port name="st_ready_test_idle"/>
        <port name="take_action_break_a"/>
        <port name="take_action_break_b"/>
        <port name="take_action_break_c"/>
        <port name="take_action_ocimem_a"/>
        <port name="take_action_ocimem_b"/>
        <port name="take_action_tracectrl"/>
        <port name="take_action_tracemem_a"/>
        <port name="take_action_tracemem_b"/>
        <port name="take_no_action_break_a"/>
        <port name="take_no_action_break_b"/>
        <port name="take_no_action_break_c"/>
        <port name="take_no_action_ocimem_a"/>
        <port name="take_no_action_tracemem_a"/>
        <port name="tdo"/>
      </outputs>
    </node>
    <node hpath="std_2C35:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic" instance_id="0" mfg_id="110" node_id="128" sld_node_info="0xC006E00" version="1">
      <parameters>
        <parameter name="INSTANCE_ID" type="dec" value="0"/>
        <parameter name="SLD_NODE_INFO" type="ubin" value="00001100000000000110111000000000"/>
        <parameter name="LOG2_TXFIFO_DEPTH" type="dec" value="6"/>
        <parameter name="LOG2_RXFIFO_DEPTH" type="dec" value="6"/>
        <parameter name="RESERVED" type="dec" value="0"/>
        <parameter name="DATA_WIDTH" type="dec" value="8"/>
        <parameter name="NODE_IR_WIDTH" type="dec" value="1"/>
        <parameter name="SCAN_LENGTH" type="dec" value="11"/>
        <parameter name=" constraint(t_dat)" type="string" value="7 downto 0"/>
        <parameter name=" constraint(r_dat)" type="string" value="7 downto 0"/>
      </parameters>
      <inputs>
        <port name="raw_tck" source="altera_internal_jtag"/>
        <port name="tck" source="altera_internal_jtag"/>
        <port name="tdi" source="altera_internal_jtag"/>
        <port name="rti" source="altera_internal_jtag"/>
        <port name="shift" source="altera_internal_jtag"/>
        <port name="update" source="altera_internal_jtag"/>
        <port name="usr1" source="sld_hub:sld_hub_inst|jtag_debug_mode_usr1"/>
        <port name="clrn" source="sld_hub:sld_hub_inst|CLR_SIGNAL"/>
        <port name="ena" source="sld_hub:sld_hub_inst|node_ena~0"/>
        <port name="ir_in[0]" source="sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[0]"/>
        <port name="jtag_state_cdr" source="sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]"/>
        <port name="jtag_state_sdr" source="sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]"/>
        <port name="jtag_state_udr" source="sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]"/>
        <port name="clk" source="std_2C35:inst|jtag_uart:the_jtag_uart|clk"/>
        <port name="rst_n" source="std_2C35:inst|jtag_uart:the_jtag_uart|rst_n"/>
        <port name="r_val" source="std_2C35:inst|jtag_uart:the_jtag_uart|r_val"/>
        <port name="r_dat[0]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[0]"/>
        <port name="r_dat[1]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[1]"/>
        <port name="r_dat[2]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[2]"/>
        <port name="r_dat[3]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[3]"/>
        <port name="r_dat[4]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[4]"/>
        <port name="r_dat[5]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[5]"/>
        <port name="r_dat[6]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[6]"/>
        <port name="r_dat[7]" source="std_2C35:inst|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|r_dat[7]"/>
        <port name="t_dav" source="std_2C35:inst|jtag_uart:the_jtag_uart|t_dav"/>
      </inputs>
      <outputs>
        <port name="tdo"/>
        <port name="irq"/>
        <port name="ir_out[0]"/>
        <port name="r_ena"/>
        <port name="r_ena"/>
        <port name="t_ena"/>
        <port name="t_ena"/>
        <port name="t_dat[0]"/>
        <port name="t_dat[1]"/>
        <port name="t_dat[2]"/>
        <port name="t_dat[3]"/>
        <port name="t_dat[4]"/>
        <port name="t_dat[5]"/>
        <port name="t_dat[6]"/>
        <port name="t_dat[7]"/>
        <port name="t_pause"/>
        <port name="t_pause"/>
      </outputs>
    </node>
  </node_info>
</sld_project_info>