signal.tan.rpt

产生sinx＋cosx波形 用于正交调制得测试信号 一次输出正交和同相分量 verilog语言

; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; clk        ; clk      ; None                        ; None                      ; 1.313 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; clk        ; clk      ; None                        ; None                      ; 1.306 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; clk        ; clk      ; None                        ; None                      ; 1.290 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[0] ; sine:inst2|addr[4]                                                                           ; clk        ; clk      ; None                        ; None                      ; 1.570 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[3] ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; clk        ; clk      ; None                        ; None                      ; 1.072 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[4] ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; clk        ; clk      ; None                        ; None                      ; 1.068 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[1] ; sine:inst2|addr[3]                                                                           ; clk        ; clk      ; None                        ; None                      ; 1.244 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[1] ; sine:inst2|addr[1]                                                                           ; clk        ; clk      ; None                        ; None                      ; 1.236 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[0] ; sine:inst2|addr[1]                                                                           ; clk        ; clk      ; None                        ; None                      ; 1.220 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[1] ; sine:inst2|addr[4]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.990 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[0] ; sine:inst2|addr[3]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.988 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[0] ; sine:inst2|addr[2]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.982 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[3] ; sine:inst2|addr[4]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.934 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[1] ; sine:inst2|addr[2]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.785 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[0] ; sine:inst2|addr[0]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.758 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; sine:inst2|addr[3]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.619 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; sine:inst2|addr[4]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.616 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[4] ; sine:inst2|addr[4]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.389 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[3] ; sine:inst2|addr[3]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.389 ns                ;
; N/A   ; Restricted to 422.12 MHz ( period = 2.369 ns ) ; sine:inst2|addr[2] ; sine:inst2|addr[2]                                                                           ; clk        ; clk      ; None                        ; None                      ; 0.389 ns                ;
+-------+------------------------------------------------+--------------------+----------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                ;
+-------+--------------+------------+------+----------------------------------------------------------------------------------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From ; To                                                                                           ; To Clock ;
+-------+--------------+------------+------+----------------------------------------------------------------------------------------------+----------+
; N/A   ; None         ; 2.691 ns   ; Txen ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; clk      ;
; N/A   ; None         ; 2.691 ns   ; Txen ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; clk      ;
; N/A   ; None         ; 2.691 ns   ; Txen ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; clk      ;
; N/A   ; None         ; 2.691 ns   ; Txen ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; clk      ;
; N/A   ; None         ; 2.691 ns   ; Txen ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; clk      ;
; N/A   ; None         ; 2.594 ns   ; Txen ; sine:inst2|addr[0]                                                                           ; clk      ;
; N/A   ; None         ; 2.594 ns   ; Txen ; sine:inst2|addr[1]                                                                           ; clk      ;
; N/A   ; None         ; 2.594 ns   ; Txen ; sine:inst2|addr[2]                                                                           ; clk      ;
; N/A   ; None         ; 2.594 ns   ; Txen ; sine:inst2|addr[3]                                                                           ; clk      ;
; N/A   ; None         ; 2.594 ns   ; Txen ; sine:inst2|addr[4]                                                                           ; clk      ;
+-------+--------------+------------+------+----------------------------------------------------------------------------------------------+----------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                      ;
+-------+--------------+------------+----------------------------------------------------------------------------------------------+----------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                                         ; To       ; From Clock ;
+-------+--------------+------------+----------------------------------------------------------------------------------------------+----------+------------+
; N/A   ; None         ; 10.072 ns  ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[2]  ; clk        ;
; N/A   ; None         ; 10.072 ns  ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[2]  ; clk        ;
; N/A   ; None         ; 10.072 ns  ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[2]  ; clk        ;
; N/A   ; None         ; 10.072 ns  ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[2]  ; clk        ;
; N/A   ; None         ; 10.072 ns  ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[2]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[5]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[5]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[5]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[5]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[5]  ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[10] ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[10] ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[10] ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[10] ; clk        ;
; N/A   ; None         ; 9.545 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[10] ; clk        ;
; N/A   ; None         ; 9.503 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[8]  ; clk        ;
; N/A   ; None         ; 9.503 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[8]  ; clk        ;
; N/A   ; None         ; 9.503 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[8]  ; clk        ;
; N/A   ; None         ; 9.503 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[8]  ; clk        ;
; N/A   ; None         ; 9.503 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[8]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[0]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[0]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[0]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[0]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[0]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[1]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[1]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[1]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[1]  ; clk        ;
; N/A   ; None         ; 9.288 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[1]  ; clk        ;
; N/A   ; None         ; 9.283 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[11] ; clk        ;
; N/A   ; None         ; 9.283 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[11] ; clk        ;
; N/A   ; None         ; 9.283 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[11] ; clk        ;
; N/A   ; None         ; 9.283 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[11] ; clk        ;
; N/A   ; None         ; 9.283 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[11] ; clk        ;
; N/A   ; None         ; 9.280 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[3]  ; clk        ;
; N/A   ; None         ; 9.280 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[3]  ; clk        ;
; N/A   ; None         ; 9.280 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[3]  ; clk        ;
; N/A   ; None         ; 9.280 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[3]  ; clk        ;
; N/A   ; None         ; 9.280 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[3]  ; clk        ;
; N/A   ; None         ; 9.278 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[6]  ; clk        ;
; N/A   ; None         ; 9.278 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[6]  ; clk        ;
; N/A   ; None         ; 9.278 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[6]  ; clk        ;
; N/A   ; None         ; 9.278 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[6]  ; clk        ;
; N/A   ; None         ; 9.278 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[6]  ; clk        ;
; N/A   ; None         ; 9.258 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[4]  ; clk        ;
; N/A   ; None         ; 9.258 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[4]  ; clk        ;
; N/A   ; None         ; 9.258 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[4]  ; clk        ;
; N/A   ; None         ; 9.258 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[4]  ; clk        ;
; N/A   ; None         ; 9.258 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[4]  ; clk        ;
; N/A   ; None         ; 9.101 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg0 ; data[7]  ; clk        ;
; N/A   ; None         ; 9.101 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg1 ; data[7]  ; clk        ;
; N/A   ; None         ; 9.101 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg2 ; data[7]  ; clk        ;
; N/A   ; None         ; 9.101 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg3 ; data[7]  ; clk        ;
; N/A   ; None         ; 9.101 ns   ; ram:inst|altsyncram:data_rtl_0|altsyncram_d1m:auto_generated|ram_block1a0~porta_address_reg4 ; data[7]  ; clk        ;