seg7.twr

多功能数字时钟设计的源程序,可以实现计时闹钟鸣笛等基本功能.

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Release 7.1i Trace H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

E:/Xilinx/bin/nt/trce.exe -ise d:\wqs\WQS.ise -intstyle ise -e 3 -l 3 -s 4 -xml
seg7 seg7.ncd -o seg7.twr seg7.pcf


Design file:              seg7.ncd
Physical constraint file: seg7.pcf
Device,speed:             xc3s400,-4 (PRODUCTION 1.35 2005-01-22)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock clk to Pad
------------+------------+------------------+--------+
            | clk (edge) |                  |  Clock |
Destination | to PAD     |Internal Clock(s) |  Phase |
------------+------------+------------------+--------+
an<0>       |   13.126(R)|clk_BUFGP         |   0.000|
an<1>       |   12.178(R)|clk_BUFGP         |   0.000|
an<2>       |   11.951(R)|clk_BUFGP         |   0.000|
an<3>       |   13.127(R)|clk_BUFGP         |   0.000|
seg<0>      |   13.064(R)|clk_BUFGP         |   0.000|
seg<1>      |   12.292(R)|clk_BUFGP         |   0.000|
seg<2>      |   12.071(R)|clk_BUFGP         |   0.000|
seg<3>      |   12.451(R)|clk_BUFGP         |   0.000|
seg<4>      |   12.264(R)|clk_BUFGP         |   0.000|
seg<5>      |   11.689(R)|clk_BUFGP         |   0.000|
seg<6>      |   12.085(R)|clk_BUFGP         |   0.000|
seg<7>      |   12.746(R)|clk_BUFGP         |   0.000|
------------+------------+------------------+--------+

Clock to Setup on destination clock clk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clk            |    6.539|         |         |         |
---------------+---------+---------+---------+---------+

Analysis completed Fri Jan 19 14:47:12 2007
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Peak Memory Usage: 86 MB