62256.vo

EPM1270和ram62256的verilog接口程序

maxii_lcell \addr[14]~reg0_I (
// Equation(s):
// \addr[14]~reg0  = DFFEAS(\Add0~250  & (\addr[9]~1376 ), GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(\Add0~250 ),
	.datab(vcc),
	.datac(vcc),
	.datad(\addr[9]~1376 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[14]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[14]~reg0_I .lut_mask = "AA00";
defparam \addr[14]~reg0_I .operation_mode = "normal";
defparam \addr[14]~reg0_I .output_mode = "reg_only";
defparam \addr[14]~reg0_I .register_cascade_mode = "off";
defparam \addr[14]~reg0_I .sum_lutc_input = "datac";
defparam \addr[14]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N1
maxii_lcell \Equal1~188_I (
// Equation(s):
// \Equal1~188  = !\addr[11]~reg0  & !\addr[10]~reg0  & !\addr[12]~reg0  & !\addr[9]~reg0 

	.clk(gnd),
	.dataa(\addr[11]~reg0 ),
	.datab(\addr[10]~reg0 ),
	.datac(\addr[12]~reg0 ),
	.datad(\addr[9]~reg0 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal1~188 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Equal1~188_I .lut_mask = "0001";
defparam \Equal1~188_I .operation_mode = "normal";
defparam \Equal1~188_I .output_mode = "comb_only";
defparam \Equal1~188_I .register_cascade_mode = "off";
defparam \Equal1~188_I .sum_lutc_input = "datac";
defparam \Equal1~188_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N2
maxii_lcell \Equal1~189_I (
// Equation(s):
// \Equal1~189  = !\addr[13]~reg0  & !\addr[14]~reg0  & \Equal1~188 

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[13]~reg0 ),
	.datac(\addr[14]~reg0 ),
	.datad(\Equal1~188 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal1~189 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Equal1~189_I .lut_mask = "0300";
defparam \Equal1~189_I .operation_mode = "normal";
defparam \Equal1~189_I .output_mode = "comb_only";
defparam \Equal1~189_I .register_cascade_mode = "off";
defparam \Equal1~189_I .sum_lutc_input = "datac";
defparam \Equal1~189_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X6_Y3_N8
maxii_lcell \Equal0~131_I (
// Equation(s):
// \Equal0~131  = \Equal0~129  # \Equal0~130  # !\Equal1~189  # !\addr[8]~reg0 

	.clk(gnd),
	.dataa(\addr[8]~reg0 ),
	.datab(\Equal0~129 ),
	.datac(\Equal0~130 ),
	.datad(\Equal1~189 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal0~131 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Equal0~131_I .lut_mask = "FDFF";
defparam \Equal0~131_I .operation_mode = "normal";
defparam \Equal0~131_I .output_mode = "comb_only";
defparam \Equal0~131_I .register_cascade_mode = "off";
defparam \Equal0~131_I .sum_lutc_input = "datac";
defparam \Equal0~131_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X4_Y4_N9
maxii_lcell \write~I (
// Equation(s):
// write = DFFEAS(write & (\mode~combout  # \Equal0~131 ) # !write & !\mode~combout  & !\always0~0 , GLOBAL(\clk~combout ), VCC, , , , , !\rst~combout , )

	.clk(\clk~combout ),
	.dataa(write),
	.datab(\mode~combout ),
	.datac(\always0~0 ),
	.datad(\Equal0~131 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(!\rst~combout ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(write),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \write~I .lut_mask = "AB89";
defparam \write~I .operation_mode = "normal";
defparam \write~I .output_mode = "reg_only";
defparam \write~I .register_cascade_mode = "off";
defparam \write~I .sum_lutc_input = "datac";
defparam \write~I .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X4_Y4_N4
maxii_lcell \WE_hold[1]~I (
// Equation(s):
// WE_hold[1] = DFFEAS(\mode~combout  & (WE_hold[1]) # !\mode~combout  & (WE_hold[1] & (!write) # !WE_hold[1] & WE_hold[0] & write), GLOBAL(\clk~combout ), VCC, , , , , !\rst~combout , )

	.clk(\clk~combout ),
	.dataa(WE_hold[0]),
	.datab(\mode~combout ),
	.datac(WE_hold[1]),
	.datad(write),
	.aclr(gnd),
	.aload(gnd),
	.sclr(!\rst~combout ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(WE_hold[1]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \WE_hold[1]~I .lut_mask = "C2F0";
defparam \WE_hold[1]~I .operation_mode = "normal";
defparam \WE_hold[1]~I .output_mode = "reg_only";
defparam \WE_hold[1]~I .register_cascade_mode = "off";
defparam \WE_hold[1]~I .sum_lutc_input = "datac";
defparam \WE_hold[1]~I .synch_mode = "on";
// synopsys translate_on

// atom is at PIN_52
maxii_io \write_clk~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\write_clk~combout ),
	.padio(write_clk));
// synopsys translate_off
defparam \write_clk~I .operation_mode = "input";
// synopsys translate_on

// atom is at LC_X5_Y4_N6
maxii_lcell \write_clk0~I (
// Equation(s):
// write_clk0 = DFFEAS(\write_clk~combout  & (\rst~combout ), GLOBAL(\clk~combout ), VCC, , , , , , )

	.clk(\clk~combout ),
	.dataa(\write_clk~combout ),
	.datab(vcc),
	.datac(\rst~combout ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(write_clk0),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \write_clk0~I .lut_mask = "A0A0";
defparam \write_clk0~I .operation_mode = "normal";
defparam \write_clk0~I .output_mode = "reg_only";
defparam \write_clk0~I .register_cascade_mode = "off";
defparam \write_clk0~I .sum_lutc_input = "datac";
defparam \write_clk0~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y4_N8
maxii_lcell \write_clk1~I (
// Equation(s):
// write_clk1 = DFFEAS(write_clk0 & (\rst~combout ), GLOBAL(\clk~combout ), VCC, , , , , , )

	.clk(\clk~combout ),
	.dataa(write_clk0),
	.datab(vcc),
	.datac(\rst~combout ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(write_clk1),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \write_clk1~I .lut_mask = "A0A0";
defparam \write_clk1~I .operation_mode = "normal";
defparam \write_clk1~I .output_mode = "reg_only";
defparam \write_clk1~I .register_cascade_mode = "off";
defparam \write_clk1~I .sum_lutc_input = "datac";
defparam \write_clk1~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y4_N1
maxii_lcell \drop~23_I (
// Equation(s):
// \drop~23  = !write_clk0 & (write & write_clk1)

	.clk(gnd),
	.dataa(write_clk0),
	.datab(vcc),
	.datac(write),
	.datad(write_clk1),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\drop~23 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \drop~23_I .lut_mask = "5000";
defparam \drop~23_I .operation_mode = "normal";
defparam \drop~23_I .output_mode = "comb_only";
defparam \drop~23_I .register_cascade_mode = "off";
defparam \drop~23_I .sum_lutc_input = "datac";
defparam \drop~23_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X4_Y4_N1
maxii_lcell \drop~I (
// Equation(s):
// drop = DFFEAS(\drop~23  # drop & (write_en1 # !write_en0), GLOBAL(\clk~combout ), VCC, , \data_in_temp[0]~274 , , , !\rst~combout , )

	.clk(\clk~combout ),
	.dataa(write_en0),
	.datab(drop),
	.datac(write_en1),
	.datad(\drop~23 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(!\rst~combout ),
	.sload(gnd),
	.ena(\data_in_temp[0]~274 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(drop),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \drop~I .lut_mask = "FFC4";
defparam \drop~I .operation_mode = "normal";
defparam \drop~I .output_mode = "reg_only";
defparam \drop~I .register_cascade_mode = "off";
defparam \drop~I .sum_lutc_input = "datac";
defparam \drop~I .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X4_Y4_N3
maxii_lcell \WE_hold~38_I (
// Equation(s):
// \WE_hold~38  = !WE_hold[1] & write_clk1 & !write_clk0 & drop

	.clk(gnd),
	.dataa(WE_hold[1]),
	.datab(write_clk1),
	.datac(write_clk0),
	.datad(drop),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\WE_hold~38 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \WE_hold~38_I .lut_mask = "0400";
defparam \WE_hold~38_I .operation_mode = "normal";
defparam \WE_hold~38_I .output_mode = "comb_only";
defparam \WE_hold~38_I .register_cascade_mode = "off";
defparam \WE_hold~38_I .sum_lutc_input = "datac";
defparam \WE_hold~38_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X4_Y4_N2
maxii_lcell \WE_hold~39_I (
// Equation(s):
// \WE_hold~39  = !WE_hold[0] & \WE_hold~38 

	.clk(gnd),
	.dataa(vcc),
	.datab(vcc),
	.datac(WE_hold[0]),
	.datad(\WE_hold~38 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\WE_hold~39 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \WE_hold~39_I .lut_mask = "0F00";
defparam \WE_hold~39_I .operation_mode = "normal";
defparam \WE_hold~39_I .output_mode = "comb_only";
defparam \WE_hold~39_I .register_cascade_mode = "off";
defparam \WE_hold~39_I .sum_lutc_input = "datac";
defparam \WE_hold~39_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X4_Y4_N5
maxii_lcell \WE_hold[0]~I (
// Equation(s):
// WE_hold[0] = DFFEAS(\mode~combout  & WE_hold[0] # !\mode~combout  & (write & (\WE_hold~39 ) # !write & WE_hold[0]), GLOBAL(\clk~combout ), VCC, , , , , !\rst~combout , )

	.clk(\clk~combout ),
	.dataa(WE_hold[0]),
	.datab(\mode~combout ),
	.datac(write),
	.datad(\WE_hold~39 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(!\rst~combout ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(WE_hold[0]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \WE_hold[0]~I .lut_mask = "BA8A";
defparam \WE_hold[0]~I .operation_mode = "normal";
defparam \WE_hold[0]~I .output_mode = "reg_only";
defparam \WE_hold[0]~I .register_cascade_mode = "off";
defparam \WE_hold[0]~I .sum_lutc_input = "datac";
defparam \WE_hold[0]~I .synch_mode = "on";
// synopsys translate_on

// atom is at LC_X3_Y3_N6
maxii_lcell \addr[7]~1384_I (
// Equation(s):
// \addr[7]~1384  = !write & (read_en0 # \Equal1~195  # !read_en1)

	.clk(gnd),
	.dataa(read_en0),
	.datab(read_en1),
	.datac(write),
	.datad(\Equal1~195 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\addr[7]~1384 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[7]~1384_I .lut_mask = "0F0B";
defparam \addr[7]~1384_I .operation_mode = "normal";
defparam \addr[7]~1384_I .output_mode = "comb_only";
defparam \addr[7]~1384_I .register_cascade_mode = "off";
defparam \addr[7]~1384_I .sum_lutc_input = "datac";
defparam \addr[7]~1384_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X3_Y3_N7
maxii_lcell \addr[7]~1363_I (
// Equation(s):
// \addr[7]~1363  = \addr[7]~1384  # !WE_hold[0] & \addr[7]~1362  # !\rst~combout 

	.cl