62256.vo

EPM1270和ram62256的verilog接口程序

	.ena(vcc),
	.cin(\Add0~225 ),
	.cin0(\Add0~231 ),
	.cin1(\Add0~231COUT1_256 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~232 ),
	.regout(),
	.cout(),
	.cout0(\Add0~233 ),
	.cout1(\Add0~233COUT1_257 ));
// synopsys translate_off
defparam \Add0~232_I .cin0_used = "true";
defparam \Add0~232_I .cin1_used = "true";
defparam \Add0~232_I .cin_used = "true";
defparam \Add0~232_I .lut_mask = "5A5F";
defparam \Add0~232_I .operation_mode = "arithmetic";
defparam \Add0~232_I .output_mode = "comb_only";
defparam \Add0~232_I .register_cascade_mode = "off";
defparam \Add0~232_I .sum_lutc_input = "cin";
defparam \Add0~232_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X6_Y3_N1
maxii_lcell \addr[5]~reg0_I (
// Equation(s):
// \addr[5]~reg0  = DFFEAS(!\addr[7]~1363  & (\addr[7]~1361  & (\Add0~232 ) # !\addr[7]~1361  & \addr_in~combout [5]), GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(\addr_in~combout [5]),
	.datab(\Add0~232 ),
	.datac(\addr[7]~1361 ),
	.datad(\addr[7]~1363 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[5]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[5]~reg0_I .lut_mask = "00CA";
defparam \addr[5]~reg0_I .operation_mode = "normal";
defparam \addr[5]~reg0_I .output_mode = "reg_only";
defparam \addr[5]~reg0_I .register_cascade_mode = "off";
defparam \addr[5]~reg0_I .sum_lutc_input = "datac";
defparam \addr[5]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X6_Y3_N5
maxii_lcell \Equal0~130_I (
// Equation(s):
// \Equal0~130  = !\addr[7]~reg0  # !\addr[4]~reg0  # !\addr[5]~reg0  # !\addr[6]~reg0 

	.clk(gnd),
	.dataa(\addr[6]~reg0 ),
	.datab(\addr[5]~reg0 ),
	.datac(\addr[4]~reg0 ),
	.datad(\addr[7]~reg0 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Equal0~130 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Equal0~130_I .lut_mask = "7FFF";
defparam \Equal0~130_I .operation_mode = "normal";
defparam \Equal0~130_I .output_mode = "comb_only";
defparam \Equal0~130_I .register_cascade_mode = "off";
defparam \Equal0~130_I .sum_lutc_input = "datac";
defparam \Equal0~130_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N2
maxii_lcell \Add0~240_I (
// Equation(s):
// \Add0~240  = \addr[9]~reg0  $ (!\Add0~235  & \Add0~239 ) # (\Add0~235  & \Add0~239COUT1_259 )
// \Add0~241  = CARRY(!\Add0~239  # !\addr[9]~reg0 )
// \Add0~241COUT1_260  = CARRY(!\Add0~239COUT1_259  # !\addr[9]~reg0 )

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[9]~reg0 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~235 ),
	.cin0(\Add0~239 ),
	.cin1(\Add0~239COUT1_259 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~240 ),
	.regout(),
	.cout(),
	.cout0(\Add0~241 ),
	.cout1(\Add0~241COUT1_260 ));
// synopsys translate_off
defparam \Add0~240_I .cin0_used = "true";
defparam \Add0~240_I .cin1_used = "true";
defparam \Add0~240_I .cin_used = "true";
defparam \Add0~240_I .lut_mask = "3C3F";
defparam \Add0~240_I .operation_mode = "arithmetic";
defparam \Add0~240_I .output_mode = "comb_only";
defparam \Add0~240_I .register_cascade_mode = "off";
defparam \Add0~240_I .sum_lutc_input = "cin";
defparam \Add0~240_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N9
maxii_lcell \addr[9]~reg0_I (
// Equation(s):
// \addr[9]~reg0  = DFFEAS(\Add0~240  & (\addr[9]~1376 ), GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(\Add0~240 ),
	.datac(vcc),
	.datad(\addr[9]~1376 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[9]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[9]~reg0_I .lut_mask = "CC00";
defparam \addr[9]~reg0_I .operation_mode = "normal";
defparam \addr[9]~reg0_I .output_mode = "reg_only";
defparam \addr[9]~reg0_I .register_cascade_mode = "off";
defparam \addr[9]~reg0_I .sum_lutc_input = "datac";
defparam \addr[9]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N3
maxii_lcell \Add0~242_I (
// Equation(s):
// \Add0~242  = \addr[10]~reg0  $ !(!\Add0~235  & \Add0~241 ) # (\Add0~235  & \Add0~241COUT1_260 )
// \Add0~243  = CARRY(\addr[10]~reg0  & !\Add0~241 )
// \Add0~243COUT1_261  = CARRY(\addr[10]~reg0  & !\Add0~241COUT1_260 )

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[10]~reg0 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~235 ),
	.cin0(\Add0~241 ),
	.cin1(\Add0~241COUT1_260 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~242 ),
	.regout(),
	.cout(),
	.cout0(\Add0~243 ),
	.cout1(\Add0~243COUT1_261 ));
// synopsys translate_off
defparam \Add0~242_I .cin0_used = "true";
defparam \Add0~242_I .cin1_used = "true";
defparam \Add0~242_I .cin_used = "true";
defparam \Add0~242_I .lut_mask = "C30C";
defparam \Add0~242_I .operation_mode = "arithmetic";
defparam \Add0~242_I .output_mode = "comb_only";
defparam \Add0~242_I .register_cascade_mode = "off";
defparam \Add0~242_I .sum_lutc_input = "cin";
defparam \Add0~242_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N7
maxii_lcell \addr[10]~reg0_I (
// Equation(s):
// \addr[10]~reg0  = DFFEAS(\Add0~242  & (\addr[9]~1376 ), GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(\Add0~242 ),
	.datac(vcc),
	.datad(\addr[9]~1376 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[10]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[10]~reg0_I .lut_mask = "CC00";
defparam \addr[10]~reg0_I .operation_mode = "normal";
defparam \addr[10]~reg0_I .output_mode = "reg_only";
defparam \addr[10]~reg0_I .register_cascade_mode = "off";
defparam \addr[10]~reg0_I .sum_lutc_input = "datac";
defparam \addr[10]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N4
maxii_lcell \Add0~244_I (
// Equation(s):
// \Add0~244  = \addr[11]~reg0  $ (!\Add0~235  & \Add0~243 ) # (\Add0~235  & \Add0~243COUT1_261 )
// \Add0~245  = CARRY(!\Add0~243COUT1_261  # !\addr[11]~reg0 )

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[11]~reg0 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~235 ),
	.cin0(\Add0~243 ),
	.cin1(\Add0~243COUT1_261 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~244 ),
	.regout(),
	.cout(\Add0~245 ),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Add0~244_I .cin0_used = "true";
defparam \Add0~244_I .cin1_used = "true";
defparam \Add0~244_I .cin_used = "true";
defparam \Add0~244_I .lut_mask = "3C3F";
defparam \Add0~244_I .operation_mode = "arithmetic";
defparam \Add0~244_I .output_mode = "comb_only";
defparam \Add0~244_I .register_cascade_mode = "off";
defparam \Add0~244_I .sum_lutc_input = "cin";
defparam \Add0~244_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N8
maxii_lcell \addr[11]~reg0_I (
// Equation(s):
// \addr[11]~reg0  = DFFEAS(\Add0~244  & \addr[9]~1376 , GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(vcc),
	.datac(\Add0~244 ),
	.datad(\addr[9]~1376 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[11]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[11]~reg0_I .lut_mask = "F000";
defparam \addr[11]~reg0_I .operation_mode = "normal";
defparam \addr[11]~reg0_I .output_mode = "reg_only";
defparam \addr[11]~reg0_I .register_cascade_mode = "off";
defparam \addr[11]~reg0_I .sum_lutc_input = "datac";
defparam \addr[11]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N5
maxii_lcell \Add0~246_I (
// Equation(s):
// \Add0~246  = \addr[12]~reg0  $ !\Add0~245 
// \Add0~247  = CARRY(\addr[12]~reg0  & !\Add0~245 )
// \Add0~247COUT1_262  = CARRY(\addr[12]~reg0  & !\Add0~245 )

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[12]~reg0 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~245 ),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~246 ),
	.regout(),
	.cout(),
	.cout0(\Add0~247 ),
	.cout1(\Add0~247COUT1_262 ));
// synopsys translate_off
defparam \Add0~246_I .cin_used = "true";
defparam \Add0~246_I .lut_mask = "C30C";
defparam \Add0~246_I .operation_mode = "arithmetic";
defparam \Add0~246_I .output_mode = "comb_only";
defparam \Add0~246_I .register_cascade_mode = "off";
defparam \Add0~246_I .sum_lutc_input = "cin";
defparam \Add0~246_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X6_Y3_N3
maxii_lcell \addr[12]~reg0_I (
// Equation(s):
// \addr[12]~reg0  = DFFEAS(\addr[9]~1376  & \Add0~246 , GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(\addr[9]~1376 ),
	.datac(\Add0~246 ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[12]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[12]~reg0_I .lut_mask = "C0C0";
defparam \addr[12]~reg0_I .operation_mode = "normal";
defparam \addr[12]~reg0_I .output_mode = "reg_only";
defparam \addr[12]~reg0_I .register_cascade_mode = "off";
defparam \addr[12]~reg0_I .sum_lutc_input = "datac";
defparam \addr[12]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N6
maxii_lcell \Add0~248_I (
// Equation(s):
// \Add0~248  = \addr[13]~reg0  $ (!\Add0~245  & \Add0~247 ) # (\Add0~245  & \Add0~247COUT1_262 )
// \Add0~249  = CARRY(!\Add0~247  # !\addr[13]~reg0 )
// \Add0~249COUT1_263  = CARRY(!\Add0~247COUT1_262  # !\addr[13]~reg0 )

	.clk(gnd),
	.dataa(vcc),
	.datab(\addr[13]~reg0 ),
	.datac(vcc),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~245 ),
	.cin0(\Add0~247 ),
	.cin1(\Add0~247COUT1_262 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~248 ),
	.regout(),
	.cout(),
	.cout0(\Add0~249 ),
	.cout1(\Add0~249COUT1_263 ));
// synopsys translate_off
defparam \Add0~248_I .cin0_used = "true";
defparam \Add0~248_I .cin1_used = "true";
defparam \Add0~248_I .cin_used = "true";
defparam \Add0~248_I .lut_mask = "3C3F";
defparam \Add0~248_I .operation_mode = "arithmetic";
defparam \Add0~248_I .output_mode = "comb_only";
defparam \Add0~248_I .register_cascade_mode = "off";
defparam \Add0~248_I .sum_lutc_input = "cin";
defparam \Add0~248_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N9
maxii_lcell \addr[13]~reg0_I (
// Equation(s):
// \addr[13]~reg0  = DFFEAS(\Add0~248  & \addr[9]~1376 , GLOBAL(\clk~combout ), VCC, , \addr[7]~1367 , , , , )

	.clk(\clk~combout ),
	.dataa(vcc),
	.datab(vcc),
	.datac(\Add0~248 ),
	.datad(\addr[9]~1376 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\addr[7]~1367 ),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\addr[13]~reg0 ),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \addr[13]~reg0_I .lut_mask = "F000";
defparam \addr[13]~reg0_I .operation_mode = "normal";
defparam \addr[13]~reg0_I .output_mode = "reg_only";
defparam \addr[13]~reg0_I .register_cascade_mode = "off";
defparam \addr[13]~reg0_I .sum_lutc_input = "datac";
defparam \addr[13]~reg0_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y2_N7
maxii_lcell \Add0~250_I (
// Equation(s):
// \Add0~250  = (!\Add0~245  & \Add0~249 ) # (\Add0~245  & \Add0~249COUT1_263 ) $ !\addr[14]~reg0 

	.clk(gnd),
	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\addr[14]~reg0 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(\Add0~245 ),
	.cin0(\Add0~249 ),
	.cin1(\Add0~249COUT1_263 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\Add0~250 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \Add0~250_I .cin0_used = "true";
defparam \Add0~250_I .cin1_used = "true";
defparam \Add0~250_I .cin_used = "true";
defparam \Add0~250_I .lut_mask = "F00F";
defparam \Add0~250_I .operation_mode = "normal";
defparam \Add0~250_I .output_mode = "comb_only";
defparam \Add0~250_I .register_cascade_mode = "off";
defparam \Add0~250_I .sum_lutc_input = "cin";
defparam \Add0~250_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X5_Y3_N0