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来自「verilog实现的异步UART代码」· 代码 · 共 15 行

/Clk_ctrl.v/1.3/Thu Jan 19 14:07:52 2006//
/MAC_rx.v/1.4/Fri Nov 17 17:53:07 2006//
/MAC_top.v/1.3/Thu Jan 19 14:07:52 2006//
/MAC_tx.v/1.4/Fri Nov 17 17:53:07 2006//
/Phy_int.v/1.3/Thu Jan 19 14:07:53 2006//
/RMON.v/1.4/Sun Jun 25 04:58:56 2006//
/eth_miim.v/1.3/Thu Jan 19 14:07:53 2006//
/header.v/1.1/Thu Jan 19 14:07:53 2006//
/reg_int.v/1.4/Fri Nov 17 17:53:07 2006//
D/MAC_rx////
D/MAC_tx////
D/RMON////
D/TECH////
D/miim////