sd_top.fit.summary

8读8写SDRAM verilog 程序

Fitter Status : Successful - Thu Jan 24 21:35:17 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : sd_top
Top-level Entity Name : sd_if
Family : FLEX10K
Device : EPF10K10TC144-3
Timing Models : Final
Total logic elements : 101 / 576 ( 18 % )
Total pins : 97 / 102 ( 95 % )
Total memory bits : 0 / 6,144 ( 0 % )