ddr2_eval.rvp

DDR2 的控制器

STYFILENAME=ddr2_eval.sty
PROJECT=ddr2_eval
ENTRY=Schematic/Verilog HDL
WORKING_PATH=d:/ddr2_sdram/ddr_p_eval/ddr2/impl
MODULE=ddr_sdram_mem_top
TOP_FILE=../src/rtl/top/ecp2m/ddr_sdram_mem_top.v
EDF_FILE_LIST=../../models/ecp2m/ddr_dqs_io.v ../../models/ecp2m/pll_120M.v ../../../ddr2_bb.v ../../models/ecp2m/ddr_sdram_mem_io_top.v ../../../ram_dp/RAM_DP.v ../../models/ecp2m/pll_266M.v ../../models/ecp2m/ddr_data_io.v ../src/rtl/top/ecp2m/ddr_sdram_mem_top.v ../../models/ecp2m/ddr_dm_io.v DDR2_eval.h
VHDL_FILE_LIST=
VERILOG_FILE_LIST=ddr2_eval.h ../../models/ecp2m/pll_120M.v
DEVICEPART=LFE2M35E-6F256CES