ddr_sdram_mem_top.edi

DDR2 的控制器

           (port rst_acth (direction INPUT))
         )
         (contents
          (instance U1_BB (viewRef PRIM (cellRef BB (libraryRef LUCENT)))
          )
          (instance U1_TODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_ODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_IDDRMFX1A (viewRef verilog (cellRef IDDRMFX1A))
           (property CLKMODE (string "SCLK"))
          )
          (net em_ddr_data_14 (joined
           (portRef B (instanceRef U1_BB))
           (portRef (member em_ddr_data 0))
          ))
          (net out_to_bb (joined
           (portRef Q (instanceRef U1_ODDRMXA))
           (portRef I (instanceRef U1_BB))
          ))
          (net out_en_reg (joined
           (portRef Q (instanceRef U1_TODDRMXA))
           (portRef T (instanceRef U1_BB))
          ))
          (net bb_to_in_tmp (joined
           (portRef O (instanceRef U1_BB))
           (portRef D (instanceRef U1_IDDRMFX1A))
          ))
          (net U1_IDDRMFX1A_kb (joined
           (portRef RST (instanceRef U1_IDDRMFX1A))
           (portRef RST (instanceRef U1_ODDRMXA))
           (portRef RST (instanceRef U1_TODDRMXA))
           (portRef rst_acth)
           )
          )
          (net ddr_write_data_valid_d0 (joined
           (portRef ddr_write_data_valid_d0)
           (portRef DB (instanceRef U1_TODDRMXA))
           (portRef DA (instanceRef U1_TODDRMXA))
          ))
          (net ddr_write_data_d1_0 (joined
           (portRef ddr_write_data_d1_0)
           (portRef DA (instanceRef U1_ODDRMXA))
          ))
          (net ddr_write_data_d1_16 (joined
           (portRef ddr_write_data_d1_16)
           (portRef DB (instanceRef U1_ODDRMXA))
          ))
          (net k_clk_c (joined
           (portRef k_clk_c)
           (portRef CLK2 (instanceRef U1_IDDRMFX1A))
           (portRef CLK1 (instanceRef U1_IDDRMFX1A))
           (portRef CLK (instanceRef U1_ODDRMXA))
           (portRef CLK (instanceRef U1_TODDRMXA))
          ))
          (net dqsxfer_clk_3 (joined
           (portRef (member dqsxfer_clk 0))
           (portRef DQSXFER (instanceRef U1_ODDRMXA))
           (portRef DQSXFER (instanceRef U1_TODDRMXA))
          ))
          (net dqsin_clk_3 (joined
           (portRef (member dqsin_clk 0))
           (portRef ECLK (instanceRef U1_IDDRMFX1A))
          ))
          (net VCC (joined
           (portRef VCC)
           (portRef CE (instanceRef U1_IDDRMFX1A))
          ))
          (net ddrclkpol_3 (joined
           (portRef (member ddrclkpol 0))
           (portRef DDRCLKPOL (instanceRef U1_IDDRMFX1A))
          ))
          (net ddr_read_data_0 (joined
           (portRef QA (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_0)
          ))
          (net ddr_read_data_16 (joined
           (portRef QB (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_16)
          ))
         )
       )
    )
    (cell bidi_cell_13 (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename ddrclkpol "ddrclkpol[0:0]") 1) (direction INPUT))
           (port (array (rename dqsin_clk "dqsin_clk[0:0]") 1) (direction INPUT))
           (port (array (rename dqsxfer_clk "dqsxfer_clk[0:0]") 1) (direction INPUT))
           (port (array (rename em_ddr_data "em_ddr_data[0:0]") 1) (direction INOUT))
           (port ddr_read_data_16 (direction OUTPUT))
           (port ddr_read_data_0 (direction OUTPUT))
           (port ddr_write_data_d1_16 (direction INPUT))
           (port ddr_write_data_d1_0 (direction INPUT))
           (port VCC (direction INPUT))
           (port k_clk_c (direction INPUT))
           (port ddr_write_data_valid_d0 (direction INPUT))
           (port rst_acth (direction INPUT))
         )
         (contents
          (instance U1_BB (viewRef PRIM (cellRef BB (libraryRef LUCENT)))
          )
          (instance U1_TODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_ODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_IDDRMFX1A (viewRef verilog (cellRef IDDRMFX1A))
           (property CLKMODE (string "SCLK"))
          )
          (net em_ddr_data_0 (joined
           (portRef B (instanceRef U1_BB))
           (portRef (member em_ddr_data 0))
          ))
          (net out_to_bb (joined
           (portRef Q (instanceRef U1_ODDRMXA))
           (portRef I (instanceRef U1_BB))
          ))
          (net out_en_reg (joined
           (portRef Q (instanceRef U1_TODDRMXA))
           (portRef T (instanceRef U1_BB))
          ))
          (net bb_to_in_tmp (joined
           (portRef O (instanceRef U1_BB))
           (portRef D (instanceRef U1_IDDRMFX1A))
          ))
          (net U1_IDDRMFX1A_kb (joined
           (portRef RST (instanceRef U1_IDDRMFX1A))
           (portRef RST (instanceRef U1_ODDRMXA))
           (portRef RST (instanceRef U1_TODDRMXA))
           (portRef rst_acth)
           )
          )
          (net ddr_write_data_valid_d0 (joined
           (portRef ddr_write_data_valid_d0)
           (portRef DB (instanceRef U1_TODDRMXA))
           (portRef DA (instanceRef U1_TODDRMXA))
          ))
          (net ddr_write_data_d1_0 (joined
           (portRef ddr_write_data_d1_0)
           (portRef DA (instanceRef U1_ODDRMXA))
          ))
          (net ddr_write_data_d1_16 (joined
           (portRef ddr_write_data_d1_16)
           (portRef DB (instanceRef U1_ODDRMXA))
          ))
          (net k_clk_c (joined
           (portRef k_clk_c)
           (portRef CLK2 (instanceRef U1_IDDRMFX1A))
           (portRef CLK1 (instanceRef U1_IDDRMFX1A))
           (portRef CLK (instanceRef U1_ODDRMXA))
           (portRef CLK (instanceRef U1_TODDRMXA))
          ))
          (net dqsxfer_clk_0 (joined
           (portRef (member dqsxfer_clk 0))
           (portRef DQSXFER (instanceRef U1_ODDRMXA))
           (portRef DQSXFER (instanceRef U1_TODDRMXA))
          ))
          (net dqsin_clk_0 (joined
           (portRef (member dqsin_clk 0))
           (portRef ECLK (instanceRef U1_IDDRMFX1A))
          ))
          (net VCC (joined
           (portRef VCC)
           (portRef CE (instanceRef U1_IDDRMFX1A))
          ))
          (net ddrclkpol_0 (joined
           (portRef (member ddrclkpol 0))
           (portRef DDRCLKPOL (instanceRef U1_IDDRMFX1A))
          ))
          (net ddr_read_data_0 (joined
           (portRef QA (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_0)
          ))
          (net ddr_read_data_16 (joined
           (portRef QB (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_16)
          ))
         )
       )
    )
    (cell bidi_cell_12 (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename ddrclkpol "ddrclkpol[0:0]") 1) (direction INPUT))
           (port (array (rename dqsin_clk "dqsin_clk[0:0]") 1) (direction INPUT))
           (port (array (rename dqsxfer_clk "dqsxfer_clk[0:0]") 1) (direction INPUT))
           (port (array (rename em_ddr_data "em_ddr_data[1:1]") 1) (direction INOUT))
           (port ddr_read_data_16 (direction OUTPUT))
           (port ddr_read_data_0 (direction OUTPUT))
           (port ddr_write_data_d1_16 (direction INPUT))
           (port ddr_write_data_d1_0 (direction INPUT))
           (port VCC (direction INPUT))
           (port k_clk_c (direction INPUT))
           (port ddr_write_data_valid_d0 (direction INPUT))
           (port rst_acth (direction INPUT))
         )
         (contents
          (instance U1_BB (viewRef PRIM (cellRef BB (libraryRef LUCENT)))
          )
          (instance U1_TODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_ODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_IDDRMFX1A (viewRef verilog (cellRef IDDRMFX1A))
           (property CLKMODE (string "SCLK"))
          )
          (net em_ddr_data_1 (joined
           (portRef B (instanceRef U1_BB))
           (portRef (member em_ddr_data 0))
          ))
          (net out_to_bb (joined
           (portRef Q (instanceRef U1_ODDRMXA))
           (portRef I (instanceRef U1_BB))
          ))
          (net out_en_reg (joined
           (portRef Q (instanceRef U1_TODDRMXA))
           (portRef T (instanceRef U1_BB))
          ))
          (net bb_to_in_tmp (joined
           (portRef O (instanceRef U1_BB))
           (portRef D (instanceRef U1_IDDRMFX1A))
          ))
          (net U1_IDDRMFX1A_kb (joined
           (portRef RST (instanceRef U1_IDDRMFX1A))
           (portRef RST (instanceRef U1_ODDRMXA))
           (portRef RST (instanceRef U1_TODDRMXA))
           (portRef rst_acth)
           )
          )
          (net ddr_write_data_valid_d0 (joined
           (portRef ddr_write_data_valid_d0)
           (portRef DB (instanceRef U1_TODDRMXA))
           (portRef DA (instanceRef U1_TODDRMXA))
          ))
          (net ddr_write_data_d1_0 (joined
           (portRef ddr_write_data_d1_0)
           (portRef DA (instanceRef U1_ODDRMXA))
          ))
          (net ddr_write_data_d1_16 (joined
           (portRef ddr_write_data_d1_16)
           (portRef DB (instanceRef U1_ODDRMXA))
          ))
          (net k_clk_c (joined
           (portRef k_clk_c)
           (portRef CLK2 (instanceRef U1_IDDRMFX1A))
           (portRef CLK1 (instanceRef U1_IDDRMFX1A))
           (portRef CLK (instanceRef U1_ODDRMXA))
           (portRef CLK (instanceRef U1_TODDRMXA))
          ))
          (net dqsxfer_clk_0 (joined
           (portRef (member dqsxfer_clk 0))
           (portRef DQSXFER (instanceRef U1_ODDRMXA))
           (portRef DQSXFER (instanceRef U1_TODDRMXA))
          ))
          (net dqsin_clk_0 (joined
           (portRef (member dqsin_clk 0))
           (portRef ECLK (instanceRef U1_IDDRMFX1A))
          ))
          (net VCC (joined
           (portRef VCC)
           (portRef CE (instanceRef U1_IDDRMFX1A))
          ))
          (net ddrclkpol_0 (joined
           (portRef (member ddrclkpol 0))
           (portRef DDRCLKPOL (instanceRef U1_IDDRMFX1A))
          ))
          (net ddr_read_data_0 (joined
           (portRef QA (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_0)
          ))
          (net ddr_read_data_16 (joined
           (portRef QB (instanceRef U1_IDDRMFX1A))
           (portRef ddr_read_data_16)
          ))
         )
       )
    )
    (cell bidi_cell_11 (cellType GENERIC)
       (view netlist (viewType NETLIST)
         (interface
           (port (array (rename ddrclkpol "ddrclkpol[1:1]") 1) (direction INPUT))
           (port (array (rename dqsin_clk "dqsin_clk[1:1]") 1) (direction INPUT))
           (port (array (rename dqsxfer_clk "dqsxfer_clk[1:1]") 1) (direction INPUT))
           (port (array (rename em_ddr_data "em_ddr_data[6:6]") 1) (direction INOUT))
           (port ddr_read_data_16 (direction OUTPUT))
           (port ddr_read_data_0 (direction OUTPUT))
           (port ddr_write_data_d1_16 (direction INPUT))
           (port ddr_write_data_d1_0 (direction INPUT))
           (port VCC (direction INPUT))
           (port k_clk_c (direction INPUT))
           (port ddr_write_data_valid_d0 (direction INPUT))
           (port rst_acth (direction INPUT))
         )
         (contents
          (instance U1_BB (viewRef PRIM (cellRef BB (libraryRef LUCENT)))
          )
          (instance U1_TODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_ODDRMXA (viewRef verilog (cellRef ODDRMXA))
           (property CLKMODE (string "SCLK"))
          )
          (instance U1_IDDRMFX1A (viewRef verilog (cellRef IDDRMFX1A))
           (property CLKMODE (string "SCLK"))
          )
          (net em_ddr_data_6 (joined
           (portRef B (instanceRef U1_BB))
           (portRef (member em_ddr_data 0))
          ))
          (net out_to_bb (joined
           (portRef Q (instanceRef U1_ODDRMXA))
           (portRef I (instanceRef U1_BB))
          ))
          (net out_en_reg (joined
           (portRef Q (instanceRef U1_TODDRMXA))
           (portRef T (instanceRef U1_BB))
          ))
          (net bb_to_in_tmp (joined
           (portRef O (instanceRef U1_BB))
           (portRef D (instanceRef U1_IDDRMFX1A))
          ))
          (net U1_IDDRMFX1A_kb (joined
           (portRef RST (instanceRef U1_IDDRMFX1A))
           (portRef RST (instanceRef U1_ODDRMXA))
           (portRef RST (instanceRef U1_TODDRMXA))
           (portRef rst_acth)
           )
          )
          (net ddr_write_data_valid_d0 (joined
           (portRef ddr_write_data_valid_d0)
           (portRef DB (instanceRef U1_TODDRMXA))