clock.tan.qmsg

这是一个实现时分秒的时钟功能的源码

{ "Info" "ITDB_FULL_TCO_RESULT" "clk hourl\[6\] counter24:u5\|count\[5\] 31.911 ns register " "Info: tco from clock \"clk\" to destination pin \"hourl\[6\]\" through register \"counter24:u5\|count\[5\]\" is 31.911 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 24.456 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 24.456 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 5; CLK Node = 'clk'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "" { clk } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "F:/mywork/clock/clock.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.723 ns) + CELL(0.935 ns) 3.127 ns counter10:u1\|c 2 REG LC_X6_Y8_N6 4 " "Info: 2: + IC(0.723 ns) + CELL(0.935 ns) = 3.127 ns; Loc. = LC_X6_Y8_N6; Fanout = 4; REG Node = 'counter10:u1\|c'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "1.658 ns" { clk counter10:u1|c } "NODE_NAME" } "" } } { "counter10.vhd" "" { Text "F:/mywork/clock/counter10.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.380 ns) + CELL(0.935 ns) 8.442 ns counter6:u2\|c 3 REG LC_X31_Y18_N8 5 " "Info: 3: + IC(4.380 ns) + CELL(0.935 ns) = 8.442 ns; Loc. = LC_X31_Y18_N8; Fanout = 5; REG Node = 'counter6:u2\|c'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "5.315 ns" { counter10:u1|c counter6:u2|c } "NODE_NAME" } "" } } { "counter6.vhd" "" { Text "F:/mywork/clock/counter6.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.790 ns) + CELL(0.935 ns) 14.167 ns counter10:u3\|c 4 REG LC_X22_Y11_N7 4 " "Info: 4: + IC(4.790 ns) + CELL(0.935 ns) = 14.167 ns; Loc. = LC_X22_Y11_N7; Fanout = 4; REG Node = 'counter10:u3\|c'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "5.725 ns" { counter6:u2|c counter10:u3|c } "NODE_NAME" } "" } } { "counter10.vhd" "" { Text "F:/mywork/clock/counter10.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.588 ns) + CELL(0.935 ns) 19.690 ns counter6:u4\|c 5 REG LC_X28_Y9_N4 6 " "Info: 5: + IC(4.588 ns) + CELL(0.935 ns) = 19.690 ns; Loc. = LC_X28_Y9_N4; Fanout = 6; REG Node = 'counter6:u4\|c'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "5.523 ns" { counter10:u3|c counter6:u4|c } "NODE_NAME" } "" } } { "counter6.vhd" "" { Text "F:/mywork/clock/counter6.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.055 ns) + CELL(0.711 ns) 24.456 ns counter24:u5\|count\[5\] 6 REG LC_X10_Y13_N4 5 " "Info: 6: + IC(4.055 ns) + CELL(0.711 ns) = 24.456 ns; Loc. = LC_X10_Y13_N4; Fanout = 5; REG Node = 'counter24:u5\|count\[5\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "4.766 ns" { counter6:u4|c counter24:u5|count[5] } "NODE_NAME" } "" } } { "counter24.vhd" "" { Text "F:/mywork/clock/counter24.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.920 ns ( 24.21 % ) " "Info: Total cell delay = 5.920 ns ( 24.21 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "18.536 ns ( 75.79 % ) " "Info: Total interconnect delay = 18.536 ns ( 75.79 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "24.456 ns" { clk counter10:u1|c counter6:u2|c counter10:u3|c counter6:u4|c counter24:u5|count[5] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "24.456 ns" { clk clk~out0 counter10:u1|c counter6:u2|c counter10:u3|c counter6:u4|c counter24:u5|count[5] } { 0.000ns 0.000ns 0.723ns 4.380ns 4.790ns 4.588ns 4.055ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "counter24.vhd" "" { Text "F:/mywork/clock/counter24.vhd" 19 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.231 ns + Longest register pin " "Info: + Longest register to pin delay is 7.231 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns counter24:u5\|count\[5\] 1 REG LC_X10_Y13_N4 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X10_Y13_N4; Fanout = 5; REG Node = 'counter24:u5\|count\[5\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "" { counter24:u5|count[5] } "NODE_NAME" } "" } } { "counter24.vhd" "" { Text "F:/mywork/clock/counter24.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.582 ns) + CELL(0.292 ns) 3.874 ns decoder:u11\|dout\[6\]~73 2 COMB LC_X24_Y1_N2 2 " "Info: 2: + IC(3.582 ns) + CELL(0.292 ns) = 3.874 ns; Loc. = LC_X24_Y1_N2; Fanout = 2; COMB Node = 'decoder:u11\|dout\[6\]~73'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "3.874 ns" { counter24:u5|count[5] decoder:u11|dout[6]~73 } "NODE_NAME" } "" } } { "decoder.vhd" "" { Text "F:/mywork/clock/decoder.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.249 ns) + CELL(2.108 ns) 7.231 ns hourl\[6\] 3 PIN PIN_101 0 " "Info: 3: + IC(1.249 ns) + CELL(2.108 ns) = 7.231 ns; Loc. = PIN_101; Fanout = 0; PIN Node = 'hourl\[6\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "3.357 ns" { decoder:u11|dout[6]~73 hourl[6] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "F:/mywork/clock/clock.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.400 ns ( 33.19 % ) " "Info: Total cell delay = 2.400 ns ( 33.19 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.831 ns ( 66.81 % ) " "Info: Total interconnect delay = 4.831 ns ( 66.81 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "7.231 ns" { counter24:u5|count[5] decoder:u11|dout[6]~73 hourl[6] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "7.231 ns" { counter24:u5|count[5] decoder:u11|dout[6]~73 hourl[6] } { 0.000ns 3.582ns 1.249ns } { 0.000ns 0.292ns 2.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "24.456 ns" { clk counter10:u1|c counter6:u2|c counter10:u3|c counter6:u4|c counter24:u5|count[5] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "24.456 ns" { clk clk~out0 counter10:u1|c counter6:u2|c counter10:u3|c counter6:u4|c counter24:u5|count[5] } { 0.000ns 0.000ns 0.723ns 4.380ns 4.790ns 4.588ns 4.055ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "F:/mywork/clock/db/clock.quartus_db" { Floorplan "F:/mywork/clock/" "" "7.231 ns" { counter24:u5|count[5] decoder:u11|dout[6]~73 hourl[6] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "7.231 ns" { counter24:u5|count[5] decoder:u11|dout[6]~73 hourl[6] } { 0.000ns 3.582ns 1.249ns } { 0.000ns 0.292ns 2.108ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 20 11:02:46 2008 " "Info: Processing ended: Thu Mar 20 11:02:46 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}