📄 clock.fit.qmsg
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{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" { } { } 0 0 "Completed register packing on registers with non-logic cell location assignments" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" { } { } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources" { } { } 0 0 "DQS I/O pins require %1!d! global routing resources" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN 29 " "Info: Automatically promoted signal \"clk\" to use Global clock in PIN 29" { } { { "clock.vhd" "" { Text "F:/mywork/clock/clock.vhd" 6 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "counter6:u4\|c Global clock " "Info: Automatically promoted signal \"counter6:u4\|c\" to use Global clock" { } { { "counter6.vhd" "" { Text "F:/mywork/clock/counter6.vhd" 10 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "counter6:u2\|c Global clock " "Info: Automatically promoted signal \"counter6:u2\|c\" to use Global clock" { } { { "counter6.vhd" "" { Text "F:/mywork/clock/counter6.vhd" 10 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "counter10:u1\|c Global clock " "Info: Automatically promoted signal \"counter10:u1\|c\" to use Global clock" { } { { "counter10.vhd" "" { Text "F:/mywork/clock/counter10.vhd" 10 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "counter10:u3\|c Global clock " "Info: Automatically promoted signal \"counter10:u3\|c\" to use Global clock" { } { { "counter10.vhd" "" { Text "F:/mywork/clock/counter10.vhd" 10 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "reset Global clock in PIN 28 " "Info: Automatically promoted signal \"reset\" to use Global clock in PIN 28" { } { { "clock.vhd" "" { Text "F:/mywork/clock/clock.vhd" 7 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
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