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vhdl语言实现的16乘16的点阵显示设计代码

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-- applicable agreement for further details.
--B1_s[0] is SHIKONG:u1|s[0]
--operation mode is normal

B1_s[0]_lut_out = !B1_s[0];
B1_s[0] = DFFEAS(B1_s[0]_lut_out, clk, VCC, , B1L79, , , , );


--C1_a[3] is WEIXUAN:u2|a[3]
--operation mode is normal

C1_a[3]_lut_out = !C1_a[3];
C1_a[3] = DFFEAS(C1_a[3]_lut_out, clk, VCC, , C1L6, , , , );


--C1_a[2] is WEIXUAN:u2|a[2]
--operation mode is normal

C1_a[2]_lut_out = C1_a[2] $ (C1_a[1] & C1_a[0]);
C1_a[2] = DFFEAS(C1_a[2]_lut_out, clk, VCC, , , , , , );


--C1_a[1] is WEIXUAN:u2|a[1]
--operation mode is normal

C1_a[1]_lut_out = !C1_a[1];
C1_a[1] = DFFEAS(C1_a[1]_lut_out, clk, VCC, , C1_a[0], , , , );


--D1L1 is XIANSHI:u3|Mux~466
--operation mode is normal

D1L1 = C1_a[3] & C1_a[2] & !C1_a[1] # !C1_a[3] & !C1_a[2] & C1_a[1];


--B1_s[1] is SHIKONG:u1|s[1]
--operation mode is normal

B1_s[1]_lut_out = D1L03;
B1_s[1] = DFFEAS(B1_s[1]_lut_out, clk, VCC, , B1L79, , , , );


--D1L02 is XIANSHI:u3|Q[2]~2129
--operation mode is normal

D1L02 = B1_s[0] & D1L1 & (!B1_s[1]);


--C1_a[0] is WEIXUAN:u2|a[0]
--operation mode is normal

C1_a[0]_lut_out = !C1_a[0];
C1_a[0] = DFFEAS(C1_a[0]_lut_out, clk, VCC, , , , , , );


--D1L2 is XIANSHI:u3|Mux~467
--operation mode is normal

D1L2 = C1_a[2] & (!C1_a[0] & !C1_a[1] # !C1_a[3]) # !C1_a[2] & (C1_a[3] # C1_a[0] & C1_a[1]);


--D1L3 is XIANSHI:u3|Mux~468
--operation mode is normal

D1L3 = !C1_a[3] & (C1_a[1] & (!C1_a[2] # !C1_a[0]) # !C1_a[1] & (C1_a[2]));


--D1L31 is XIANSHI:u3|Q[0]~2130
--operation mode is normal

D1L31 = B1_s[1] & (B1_s[0] & D1L2 # !B1_s[0] & (D1L3));


--D1L4 is XIANSHI:u3|Mux~469
--operation mode is normal

D1L4 = C1_a[0] & C1_a[1] & C1_a[2] & !C1_a[3] # !C1_a[0] & !C1_a[1] & !C1_a[2] & C1_a[3];


--D1L41 is XIANSHI:u3|Q[0]~2131
--operation mode is normal

D1L41 = !B1_s[0] & !B1_s[1];


--D1L51 is XIANSHI:u3|Q[0]~2132
--operation mode is normal

D1L51 = D1L02 # D1L31 # D1L4 & D1L41;


--D1L61 is XIANSHI:u3|Q[1]~2133
--operation mode is normal

D1L61 = B1_s[1] & D1L2 # !B1_s[1] & (D1L1);


--D1L71 is XIANSHI:u3|Q[1]~2134
--operation mode is normal

D1L71 = C1_a[1] & !C1_a[3] & (B1_s[1] # C1_a[2]) # !C1_a[1] & (C1_a[2] & B1_s[1] & !C1_a[3] # !C1_a[2] & (C1_a[3]));


--D1L81 is XIANSHI:u3|Q[1]~2135
--operation mode is normal

D1L81 = B1_s[0] & D1L61 # !B1_s[0] & (D1L71);


--D1L5 is XIANSHI:u3|Mux~470
--operation mode is normal

D1L5 = C1_a[2] & (C1_a[1] # C1_a[0]) # !C1_a[2] & (!C1_a[0] # !C1_a[1]);


--D1L12 is XIANSHI:u3|Q[2]~2136
--operation mode is normal

D1L12 = B1_s[0] & (B1_s[1] & (!D1L5) # !B1_s[1] & D1L1);


--D1L91 is XIANSHI:u3|Q[1]~2137
--operation mode is normal

D1L91 = !B1_s[1] & (C1_a[1] & C1_a[2] & !C1_a[3] # !C1_a[1] & !C1_a[2] & C1_a[3]);


--D1L6 is XIANSHI:u3|Mux~471
--operation mode is normal

D1L6 = C1_a[1] & (C1_a[0] & (!C1_a[3]) # !C1_a[0] & !C1_a[2]) # !C1_a[1] & (!C1_a[2] & C1_a[3]);


--D1L22 is XIANSHI:u3|Q[2]~2138
--operation mode is normal

D1L22 = B1_s[1] & D1L6;


--D1L32 is XIANSHI:u3|Q[2]~2139
--operation mode is normal

D1L32 = D1L12 # !B1_s[0] & (D1L91 # D1L22);


--D1L14 is XIANSHI:u3|Q[15]~2140
--operation mode is normal

D1L14 = B1_s[1] & (!B1_s[0]);


--D1L7 is XIANSHI:u3|Mux~472
--operation mode is normal

D1L7 = C1_a[0] & !C1_a[1] & (C1_a[2] $ C1_a[3]) # !C1_a[0] & C1_a[1] & (C1_a[2] $ C1_a[3]);


--D1L8 is XIANSHI:u3|Mux~473
--operation mode is normal

D1L8 = !C1_a[3] & (C1_a[0] & C1_a[1] & !C1_a[2] # !C1_a[0] & !C1_a[1] & C1_a[2]);


--D1L42 is XIANSHI:u3|Q[3]~2141
--operation mode is normal

D1L42 = B1_s[0] & B1_s[1] & D1L8;


--D1L52 is XIANSHI:u3|Q[3]~2142
--operation mode is normal

D1L52 = !D1L02 & !D1L42 & (!D1L7 # !D1L41);


--D1L62 is XIANSHI:u3|Q[3]~2143
--operation mode is normal

D1L62 = C1_a[1] & D1L14 & !C1_a[2] # !D1L52;


--D1L9 is XIANSHI:u3|Mux~474
--operation mode is normal

D1L9 = C1_a[1] & !C1_a[2] & (C1_a[0] # !C1_a[3]) # !C1_a[1] & !C1_a[0] & C1_a[2] & C1_a[3];


--D1L82 is XIANSHI:u3|Q[5]~2144
--operation mode is normal

D1L82 = !B1_s[0] & (C1_a[3] & C1_a[1] & !C1_a[2] # !C1_a[3] & !C1_a[1] & C1_a[2]);


--D1L92 is XIANSHI:u3|Q[5]~2145
--operation mode is normal

D1L92 = B1_s[0] & D1L8;


--D1L03 is XIANSHI:u3|Q[5]~2146
--operation mode is normal

D1L03 = B1_s[0] $ B1_s[1];


--D1L13 is XIANSHI:u3|Q[5]~2147
--operation mode is normal

D1L13 = D1L03 & D1L1 # !D1L03 & (D1L82 # D1L92);


--D1L01 is XIANSHI:u3|Mux~475
--operation mode is normal

D1L01 = C1_a[3] & (!C1_a[2] # !C1_a[1]) # !C1_a[3] & (C1_a[1] # C1_a[2]);


--D1L23 is XIANSHI:u3|Q[7]~2148
--operation mode is normal

D1L23 = B1_s[0] & (B1_s[1]) # !B1_s[0] & (B1_s[1] & D1L1 # !B1_s[1] & (!D1L5));


--D1L33 is XIANSHI:u3|Q[7]~2149
--operation mode is normal

D1L33 = B1_s[0] & (D1L23 & (D1L8) # !D1L23 & D1L01) # !B1_s[0] & (D1L23);


--D1L43 is XIANSHI:u3|Q[9]~2150
--operation mode is normal

D1L43 = B1_s[0] & (B1_s[1] & D1L8 # !B1_s[1] & (D1L1)) # !B1_s[0] & (D1L1);


--D1L11 is XIANSHI:u3|Mux~476
--operation mode is normal

D1L11 = C1_a[0] & !C1_a[1] & (C1_a[2] $ !C1_a[3]) # !C1_a[0] & C1_a[1] & (C1_a[2] $ !C1_a[3]);


--D1L73 is XIANSHI:u3|Q[12]~2151
--operation mode is normal

D1L73 = C1_a[1] & D1L14 & !C1_a[2] # !D1L53;


--D1L83 is XIANSHI:u3|Q[13]~2152
--operation mode is normal

D1L83 = !D1L02 & !D1L42 & (D1L01 # !D1L41);


--D1L21 is XIANSHI:u3|Mux~477
--operation mode is normal

D1L21 = C1_a[1] # C1_a[2];


--D1L04 is XIANSHI:u3|Q[14]~2153
--operation mode is normal

D1L04 = D1L14 & (C1_a[3] $ D1L21) # !D1L83;


--D1L24 is XIANSHI:u3|Q[15]~2154
--operation mode is normal

D1L24 = D1L02 # D1L42 # D1L3 & D1L14;


--B1_jishu[30] is SHIKONG:u1|jishu[30]
--operation mode is normal

B1_jishu[30]_lut_out = B1L1 & B1L79;
B1_jishu[30] = DFFEAS(B1_jishu[30]_lut_out, clk, VCC, , , , , , );


--B1_jishu[29] is SHIKONG:u1|jishu[29]
--operation mode is normal

B1_jishu[29]_lut_out = B1L3 & B1L79;
B1_jishu[29] = DFFEAS(B1_jishu[29]_lut_out, clk, VCC, , , , , , );


--B1_jishu[28] is SHIKONG:u1|jishu[28]
--operation mode is normal

B1_jishu[28]_lut_out = B1L5 & B1L79;
B1_jishu[28] = DFFEAS(B1_jishu[28]_lut_out, clk, VCC, , , , , , );


--B1_jishu[27] is SHIKONG:u1|jishu[27]
--operation mode is normal

B1_jishu[27]_lut_out = B1L7 & B1L79;
B1_jishu[27] = DFFEAS(B1_jishu[27]_lut_out, clk, VCC, , , , , , );


--B1L89 is SHIKONG:u1|reduce_nor~281
--operation mode is normal

B1L89 = B1_jishu[30] # B1_jishu[29] # B1_jishu[28] # B1_jishu[27];


--B1_jishu[26] is SHIKONG:u1|jishu[26]
--operation mode is normal

B1_jishu[26]_lut_out = B1L9 & B1L79;
B1_jishu[26] = DFFEAS(B1_jishu[26]_lut_out, clk, VCC, , , , , , );


--B1_jishu[25] is SHIKONG:u1|jishu[25]
--operation mode is normal

B1_jishu[25]_lut_out = B1L11 & B1L79;
B1_jishu[25] = DFFEAS(B1_jishu[25]_lut_out, clk, VCC, , , , , , );


--B1_jishu[24] is SHIKONG:u1|jishu[24]
--operation mode is normal

B1_jishu[24]_lut_out = B1L31 & B1L79;
B1_jishu[24] = DFFEAS(B1_jishu[24]_lut_out, clk, VCC, , , , , , );


--B1_jishu[23] is SHIKONG:u1|jishu[23]
--operation mode is normal

B1_jishu[23]_lut_out = B1L51 & B1L79;
B1_jishu[23] = DFFEAS(B1_jishu[23]_lut_out, clk, VCC, , , , , , );


--B1L99 is SHIKONG:u1|reduce_nor~282
--operation mode is normal

B1L99 = B1_jishu[26] # B1_jishu[25] # B1_jishu[24] # B1_jishu[23];


--B1_jishu[22] is SHIKONG:u1|jishu[22]
--operation mode is normal

B1_jishu[22]_lut_out = B1L71 & B1L79;
B1_jishu[22] = DFFEAS(B1_jishu[22]_lut_out, clk, VCC, , , , , , );


--B1_jishu[21] is SHIKONG:u1|jishu[21]
--operation mode is normal

B1_jishu[21]_lut_out = B1L91 & B1L79;
B1_jishu[21] = DFFEAS(B1_jishu[21]_lut_out, clk, VCC, , , , , , );


--B1_jishu[20] is SHIKONG:u1|jishu[20]
--operation mode is normal

B1_jishu[20]_lut_out = B1L12 & B1L79;
B1_jishu[20] = DFFEAS(B1_jishu[20]_lut_out, clk, VCC, , , , , , );


--B1_jishu[19] is SHIKONG:u1|jishu[19]
--operation mode is normal

B1_jishu[19]_lut_out = B1L32 & B1L79;
B1_jishu[19] = DFFEAS(B1_jishu[19]_lut_out, clk, VCC, , , , , , );


--B1L001 is SHIKONG:u1|reduce_nor~283
--operation mode is normal

B1L001 = B1_jishu[22] # B1_jishu[21] # B1_jishu[20] # B1_jishu[19];


--B1_jishu[18] is SHIKONG:u1|jishu[18]
--operation mode is normal

B1_jishu[18]_lut_out = B1L52 & B1L79;
B1_jishu[18] = DFFEAS(B1_jishu[18]_lut_out, clk, VCC, , , , , , );


--B1_jishu[17] is SHIKONG:u1|jishu[17]
--operation mode is normal

B1_jishu[17]_lut_out = B1L72 & B1L79;
B1_jishu[17] = DFFEAS(B1_jishu[17]_lut_out, clk, VCC, , , , , , );


--B1_jishu[16] is SHIKONG:u1|jishu[16]
--operation mode is normal

B1_jishu[16]_lut_out = B1L92;
B1_jishu[16] = DFFEAS(B1_jishu[16]_lut_out, clk, VCC, , , , , , );


--B1_jishu[15] is SHIKONG:u1|jishu[15]
--operation mode is normal

B1_jishu[15]_lut_out = B1L13;
B1_jishu[15] = DFFEAS(B1_jishu[15]_lut_out, clk, VCC, , , , , , );


--B1L101 is SHIKONG:u1|reduce_nor~284
--operation mode is normal

B1L101 = B1_jishu[18] # B1_jishu[17] # B1_jishu[16] # B1_jishu[15];


--B1L201 is SHIKONG:u1|reduce_nor~285
--operation mode is normal

B1L201 = B1L89 # B1L99 # B1L001 # B1L101;


--B1_jishu[14] is SHIKONG:u1|jishu[14]
--operation mode is normal

B1_jishu[14]_lut_out = B1L33 & B1L79;
B1_jishu[14] = DFFEAS(B1_jishu[14]_lut_out, clk, VCC, , , , , , );


--B1_jishu[13] is SHIKONG:u1|jishu[13]
--operation mode is normal

B1_jishu[13]_lut_out = B1L53 & B1L79;
B1_jishu[13] = DFFEAS(B1_jishu[13]_lut_out, clk, VCC, , , , , , );


--B1L301 is SHIKONG:u1|reduce_nor~286
--operation mode is normal

B1L301 = B1_jishu[14] # B1_jishu[13];


--B1_jishu[12] is SHIKONG:u1|jishu[12]
--operation mode is normal

B1_jishu[12]_lut_out = B1L73 & B1L79;
B1_jishu[12] = DFFEAS(B1_jishu[12]_lut_out, clk, VCC, , , , , , );


--B1_jishu[11] is SHIKONG:u1|jishu[11]
--operation mode is normal

B1_jishu[11]_lut_out = B1L93 & B1L79;
B1_jishu[11] = DFFEAS(B1_jishu[11]_lut_out, clk, VCC, , , , , , );


--B1_jishu[10] is SHIKONG:u1|jishu[10]
--operation mode is normal

B1_jishu[10]_lut_out = B1L14;
B1_jishu[10] = DFFEAS(B1_jishu[10]_lut_out, clk, VCC, , , , , , );


--B1_jishu[9] is SHIKONG:u1|jishu[9]
--operation mode is normal

B1_jishu[9]_lut_out = B1L34;
B1_jishu[9] = DFFEAS(B1_jishu[9]_lut_out, clk, VCC, , , , , , );


--B1_jishu[8] is SHIKONG:u1|jishu[8]
--operation mode is normal

B1_jishu[8]_lut_out = B1L54 & B1L79;
B1_jishu[8] = DFFEAS(B1_jishu[8]_lut_out, clk, VCC, , , , , , );


--B1_jishu[7] is SHIKONG:u1|jishu[7]
--operation mode is normal

B1_jishu[7]_lut_out = B1L74;
B1_jishu[7] = DFFEAS(B1_jishu[7]_lut_out, clk, VCC, , , , , , );


--B1L401 is SHIKONG:u1|reduce_nor~287
--operation mode is normal

B1L401 = B1_jishu[10] # B1_jishu[9] # B1_jishu[8] # B1_jishu[7];


--B1L501 is SHIKONG:u1|reduce_nor~288
--operation mode is normal

B1L501 = B1L301 # B1_jishu[12] # B1_jishu[11] # B1L401;


--B1_jishu[6] is SHIKONG:u1|jishu[6]
--operation mode is normal

B1_jishu[6]_lut_out = B1L94 & B1L79;
B1_jishu[6] = DFFEAS(B1_jishu[6]_lut_out, clk, VCC, , , , , , );


--B1_jishu[5] is SHIKONG:u1|jishu[5]
--operation mode is normal

B1_jishu[5]_lut_out = B1L15;
B1_jishu[5] = DFFEAS(B1_jishu[5]_lut_out, clk, VCC, , , , , , );


--B1_jishu[4] is SHIKONG:u1|jishu[4]
--operation mode is normal

B1_jishu[4]_lut_out = B1L35 & B1L79;
B1_jishu[4] = DFFEAS(B1_jishu[4]_lut_out, clk, VCC, , , , , , );


--B1_jishu[3] is SHIKONG:u1|jishu[3]
--operation mode is normal

B1_jishu[3]_lut_out = B1L55 & B1L79;
B1_jishu[3] = DFFEAS(B1_jishu[3]_lut_out, clk, VCC, , , , , , );


--B1L601 is SHIKONG:u1|reduce_nor~289
--operation mode is normal

B1L601 = B1_jishu[6] # B1_jishu[5] # B1_jishu[4] # B1_jishu[3];


--B1_jishu[2] is SHIKONG:u1|jishu[2]
--operation mode is normal

B1_jishu[2]_lut_out = B1L75 & B1L79;
B1_jishu[2] = DFFEAS(B1_jishu[2]_lut_out, clk, VCC, , , , , , );


--B1_jishu[1] is SHIKONG:u1|jishu[1]
--operation mode is normal

B1_jishu[1]_lut_out = B1L95 & B1L79;
B1_jishu[1] = DFFEAS(B1_jishu[1]_lut_out, clk, VCC, , , , , , );


--B1_jishu[0] is SHIKONG:u1|jishu[0]
--operation mode is normal

B1_jishu[0]_lut_out = B1L16 & B1L79;
B1_jishu[0] = DFFEAS(B1_jishu[0]_lut_out, clk, VCC, , , , , , );