dzxs.fit.summary

来自「vhdl语言实现的16乘16的点阵显示设计代码」· SUMMARY 代码 · 共 14 行

Flow Status : Successful - Fri Sep 21 10:46:44 2007
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : dzxs
Top-level Entity Name : dzxs
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 120 / 2,910 ( 4 % )
Total pins : 21 / 104 ( 20 % )
Total virtual pins : 0
Total memory bits : 0 / 59,904 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )