dzxs.hier_info

vhdl语言实现的16乘16的点阵显示设计代码

|dzxs
clk => weixuan:u2.CLK
clk => shikong:u1.CLK
hang[0] <= xianshi:u3.Q[0]
hang[1] <= xianshi:u3.Q[1]
hang[2] <= xianshi:u3.Q[2]
hang[3] <= xianshi:u3.Q[3]
hang[4] <= xianshi:u3.Q[4]
hang[5] <= xianshi:u3.Q[5]
hang[6] <= xianshi:u3.Q[6]
hang[7] <= xianshi:u3.Q[7]
hang[8] <= xianshi:u3.Q[8]
hang[9] <= xianshi:u3.Q[9]
hang[10] <= xianshi:u3.Q[10]
hang[11] <= xianshi:u3.Q[11]
hang[12] <= xianshi:u3.Q[12]
hang[13] <= xianshi:u3.Q[13]
hang[14] <= xianshi:u3.Q[14]
hang[15] <= xianshi:u3.Q[15]
lei[0] <= weixuan:u2.Q[0]
lei[1] <= weixuan:u2.Q[1]
lei[2] <= weixuan:u2.Q[2]
lei[3] <= weixuan:u2.Q[3]


|dzxs|SHIKONG:u1
CLK => jishu[30].CLK
CLK => jishu[29].CLK
CLK => jishu[28].CLK
CLK => jishu[27].CLK
CLK => jishu[26].CLK
CLK => jishu[25].CLK
CLK => jishu[24].CLK
CLK => jishu[23].CLK
CLK => jishu[22].CLK
CLK => jishu[21].CLK
CLK => jishu[20].CLK
CLK => jishu[19].CLK
CLK => jishu[18].CLK
CLK => jishu[17].CLK
CLK => jishu[16].CLK
CLK => jishu[15].CLK
CLK => jishu[14].CLK
CLK => jishu[13].CLK
CLK => jishu[12].CLK
CLK => jishu[11].CLK
CLK => jishu[10].CLK
CLK => jishu[9].CLK
CLK => jishu[8].CLK
CLK => jishu[7].CLK
CLK => jishu[6].CLK
CLK => jishu[5].CLK
CLK => jishu[4].CLK
CLK => jishu[3].CLK
CLK => jishu[2].CLK
CLK => jishu[1].CLK
CLK => jishu[0].CLK
CLK => s[1].CLK
CLK => s[0].CLK
CLK => jishu[31].CLK
Q[0] <= s[0].DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= s[1].DB_MAX_OUTPUT_PORT_TYPE


|dzxs|WEIXUAN:u2
CLK => a[2].CLK
CLK => a[1].CLK
CLK => a[0].CLK
CLK => a[3].CLK
Q[0] <= a[0].DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= a[1].DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= a[2].DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= a[3].DB_MAX_OUTPUT_PORT_TYPE


|dzxs|XIANSHI:u3
SHI[0] => Mux~16.IN2
SHI[0] => Mux~17.IN1
SHI[0] => Mux~18.IN1
SHI[0] => Mux~19.IN1
SHI[0] => Mux~20.IN1
SHI[0] => Mux~21.IN1
SHI[0] => Mux~22.IN1
SHI[0] => Mux~23.IN1
SHI[0] => Mux~24.IN1
SHI[0] => Mux~25.IN1
SHI[0] => Mux~26.IN1
SHI[0] => Mux~27.IN1
SHI[0] => Mux~28.IN1
SHI[0] => Mux~29.IN1
SHI[0] => Mux~30.IN1
SHI[0] => Mux~31.IN1
SHI[1] => Mux~16.IN1
SHI[1] => Mux~17.IN0
SHI[1] => Mux~18.IN0
SHI[1] => Mux~19.IN0
SHI[1] => Mux~20.IN0
SHI[1] => Mux~21.IN0
SHI[1] => Mux~22.IN0
SHI[1] => Mux~23.IN0
SHI[1] => Mux~24.IN0
SHI[1] => Mux~25.IN0
SHI[1] => Mux~26.IN0
SHI[1] => Mux~27.IN0
SHI[1] => Mux~28.IN0
SHI[1] => Mux~29.IN0
SHI[1] => Mux~30.IN0
SHI[1] => Mux~31.IN0
WEI[0] => Mux~1.IN19
WEI[0] => Mux~3.IN19
WEI[0] => Mux~5.IN19
WEI[0] => Mux~8.IN19
WEI[0] => Mux~10.IN19
WEI[0] => Mux~12.IN19
WEI[0] => Mux~13.IN19
WEI[0] => Mux~14.IN10
WEI[0] => Mux~15.IN19
WEI[1] => Mux~0.IN10
WEI[1] => Mux~1.IN18
WEI[1] => Mux~2.IN10
WEI[1] => Mux~3.IN18
WEI[1] => Mux~4.IN10
WEI[1] => Mux~5.IN18
WEI[1] => Mux~6.IN10
WEI[1] => Mux~7.IN10
WEI[1] => Mux~8.IN18
WEI[1] => Mux~9.IN10
WEI[1] => Mux~10.IN18
WEI[1] => Mux~11.IN5
WEI[1] => Mux~12.IN18
WEI[1] => Mux~13.IN18
WEI[1] => Mux~14.IN9
WEI[1] => Mux~15.IN18
WEI[2] => Mux~0.IN9
WEI[2] => Mux~1.IN17
WEI[2] => Mux~2.IN9
WEI[2] => Mux~3.IN17
WEI[2] => Mux~4.IN9
WEI[2] => Mux~5.IN17
WEI[2] => Mux~6.IN9
WEI[2] => Mux~7.IN9
WEI[2] => Mux~8.IN17
WEI[2] => Mux~9.IN9
WEI[2] => Mux~10.IN17
WEI[2] => Mux~11.IN4
WEI[2] => Mux~12.IN17
WEI[2] => Mux~13.IN17
WEI[2] => Mux~14.IN8
WEI[2] => Mux~15.IN17
WEI[3] => Mux~0.IN8
WEI[3] => Mux~1.IN16
WEI[3] => Mux~2.IN8
WEI[3] => Mux~3.IN16
WEI[3] => Mux~4.IN8
WEI[3] => Mux~5.IN16
WEI[3] => Mux~6.IN8
WEI[3] => Mux~7.IN8
WEI[3] => Mux~8.IN16
WEI[3] => Mux~9.IN8
WEI[3] => Mux~10.IN16
WEI[3] => Mux~12.IN16
WEI[3] => Mux~13.IN16
WEI[3] => Mux~15.IN16
Q[0] <= Mux~31.DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= Mux~30.DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= Mux~29.DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= Mux~28.DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= Mux~27.DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= Mux~26.DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= Mux~25.DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= Mux~24.DB_MAX_OUTPUT_PORT_TYPE
Q[8] <= Mux~23.DB_MAX_OUTPUT_PORT_TYPE
Q[9] <= Mux~22.DB_MAX_OUTPUT_PORT_TYPE
Q[10] <= Mux~21.DB_MAX_OUTPUT_PORT_TYPE
Q[11] <= Mux~20.DB_MAX_OUTPUT_PORT_TYPE
Q[12] <= Mux~19.DB_MAX_OUTPUT_PORT_TYPE
Q[13] <= Mux~18.DB_MAX_OUTPUT_PORT_TYPE
Q[14] <= Mux~17.DB_MAX_OUTPUT_PORT_TYPE
Q[15] <= Mux~16.DB_MAX_OUTPUT_PORT_TYPE