fxu_pli_utils.c

arm10_verilog.rar是基于arm10的verilog代码

#include <stdio.h>
#include <stdlib.h>
#include "/nfs/ds.eecs.umich.edu/ecad2/solaris/vcs3.1.3/sun_sparc_solaris_5.4/lib/acc_user.h"

#define SERVER_MAX_LINE_LENGTH 80

#define INC_PTR(_ptr,_base, _size)\
  if((++_ptr - _base)  >= _size) _ptr = _base;

#define STORE_BUFFER_SIZE 100

void dumpr();
void simdumpr();

struct Store_Record
  {
    unsigned	addr;
    unsigned	data;
  };


FILE *regfile;
int verify_enable;

struct Store_Record *store_head, *store_tail;

void init_sim()
{
  char *filename;
  FILE *infile;
  char input_string[80];
  int scan_flag;
  int *limit,*checkpoint,*timeout;

  filename=(char *)tf_getcstringp(1);
  if((infile=(fopen(filename,"r")))==NULL) {
    tf_error("Cannot open '%s' file for reading\n",filename);
    tf_dofinish();
  }

  scan_flag = fscanf (infile, "%s ", input_string);
  while(scan_flag != EOF){
    if( (strcmp(input_string, "instr_limit") == 0)){
      fscanf(infile, "%d ", &limit);
    }
    else if( (strcmp(input_string, "checkpoint") == 0)){
      fscanf(infile, "%d ", &checkpoint);
    }
    else if( (strcmp(input_string, "timeout") == 0)){
      fscanf(infile, "%d ", &timeout);
    }
    else{
      tf_error("incorrect simulation init variable '%s'\n",input_string);
      tf_dofinish();
    }
    scan_flag = fscanf (infile, "%s ", input_string);
  }

  tf_putp(2,limit);		/* instr limit */
  tf_putp(3,checkpoint);	/* next checkpoint */
  tf_putp(4,timeout);		/* timeout */

  fclose(infile);

  store_head = (struct Store_Record *)
               calloc (STORE_BUFFER_SIZE, sizeof(*store_head)); 
  store_tail = store_head;

}

void init_state()
{
  char *filename;
  FILE *infile;
  char hname[80];
  char input_string[80];
  int scan_flag;
  handle reg;
  static s_setval_delay delay_s = {{accRealTime}, accNoDelay};
  char str[80];
  static s_setval_value value_s = {accHexStrVal};

  /* read values from command line and determine simulatin configuration */

  /* open a file to read from */
  filename=(char *)tf_getcstringp(1);
  if((infile=(fopen(filename,"r")))==NULL) {
    tf_error("Cannot open '%s' file for reading\n",filename);
    tf_dofinish();
  } //not doing this anymore... hard coded in initial values.

  /* open a file to write register values to */
  filename=(char *)tf_getcstringp(2);
  if((regfile=(fopen(filename,"w")))==NULL) {
    tf_error("Cannot open '%s' file for writing\n",filename);
    tf_dofinish();
  }

  //delay_s.time.real = 0;

  scan_flag = fscanf (infile, "%s ", input_string);
  while(scan_flag != EOF){

    /* set any gpr values, they begin with an 'r' */
    if(input_string[0] == 'r'){
      fscanf(infile, "%s ", &str);
      if(str[0]=='0' && str[1]=='x') {
           value_s.value.str = str+2; //used to be &str
      } else {
	   value_s.value.str = str;
      }
      fprintf(stdout, "%s = %s\n",input_string,value_s.value.str);
      sprintf(hname,"%s%s","test_arm.arm10.",input_string);
      reg = acc_handle_object(hname);
      acc_set_value(reg,&value_s,&delay_s);
      fprintf(stdout, "%s = %s\n",input_string,acc_fetch_value(reg,"%x"));
    }

    /* the pc is really just r15, but oh well */
    else if( (strcmp(input_string, "cia") == 0)){
      fscanf(infile, "%s ", &str);
      value_s.value.str = str; //used to be &str
      fprintf(stdout, "cia = %s\n",value_s.value.str);
      //sprintf(&hname,"%s","test_arm.arm10.PC",input_string);
      reg = acc_handle_object("test_arm.arm10.r15");
      acc_set_value(reg,&value_s,&delay_s);
      fprintf(stdout, "pc = %s\n",acc_fetch_value(reg,"%x"));
    }

    /* misc registers */
    else{
      fscanf(infile, "%s ", &str);
      value_s.value.str = str; //used to be &str
      fprintf(stdout, "%s = %s\n",input_string,value_s.value.str);
      sprintf(hname,"%s%s","test_arm10.",input_string);
      reg = acc_handle_object(hname);
      acc_set_value(reg,&value_s,&delay_s);
      fprintf(stdout, "%s = %s\n",input_string,acc_fetch_value(reg,"%x"));
    }

    //fprintf(stdout, "input_string = %s\n",input_string);
    scan_flag = fscanf (infile, "%s ", input_string);
  }

  fclose(infile); //hardcoded values in the verilog file

}

/* Main loop for checker */
void check_state()
{

  int icount;	/* current instruction count */
  int icheck;	/* instruction checkpoint */
  int ilimit;	/* the maximum number of instructions */
  int timer;	/* current cycle count */
  int timeout;	/* the maximum number of cycles */

  int istep;	/* checkpoint interval */   /* update with next next checkpoint (gloabl instruction number) */

  int current_time;	/* current time */

  char input_line[SERVER_MAX_LINE_LENGTH];
  char output_line[SERVER_MAX_LINE_LENGTH];

  static int executing_step = 0;

  istep = 10;

  current_time = tf_gettime();

  if(tf_nump() != 5) {
    tf_error("Improper use of command $check_state\n");
    tf_error("  Usage: $check_state(icount,icheck,ilimit,timer,timeout);\n");
    tf_dofinish();
  }

  icount = tf_getp(1);
  icheck = tf_getp(2);
  ilimit = tf_getp(3);
  timer = tf_getp(4);
  timeout = tf_getp(5);

  
    fprintf(stderr,"check_state: %d\n icount = %d\n icheck = %d\n",current_time,icount,icheck);
    fprintf(stderr," ilimit = %d\n timer = %d\n timeout = %d\n",ilimit,timer,timeout);
    


  if (verify_enable)
    {
      /* Did we just return from a "step" command? If yes, print "done" */
      if (executing_step)
	{
	  executing_step=0;
	  fprintf(stdout,"sim: done\n");
	  fflush(stdout);
	}

      /* Main loop for accepting interactive commands */
      for(;;)
	{
	  gets(input_line);

	  if (!strcmp(input_line,"send_state"))
	    {
	      simdumpr();
	    }
          else if (!strcmp(input_line,"send_stores"))
            {
              send_stores();
            }
	  else if (!strncmp(input_line,"step",4))
	    {
	      int instructions = 0;

	      /* get argument on next line (number of steps) */
	      //gets(input_line);
	      if (1==sscanf(input_line+4,"%i",&istep))
		{
		  tf_putp(2,icheck + istep);
		  executing_step = 1;
		  return; /* give up control to verilog to run the instructions */
		}
	      else
		fprintf(stdout,"sim: ERROR(0) argument to step was wrong\n");
	    }
	  else if (!strcmp(input_line,"quit"))
	    {
	      tf_dofinish();
	    }
	  else
	    {
	      fprintf(stdout,"sim: ERROR(0) Unknown command '%s'\n",input_line);
	    }

	  /* Send this after every command is executed */
	  fprintf(stdout,"sim: done\n");
	  fflush(stdout);
	}
    }
  else
    {
      /* at a checkpoint, dump registers and save state */
      if(icount == icheck){
	if(verify_enable){simdumpr();}
	else{dumpr();}
	tf_putp(2,icheck + istep);
      }

      /* icount has reached the limit */
      if(icount >= ilimit || timer >= timeout){

	if(icount >= ilimit)
	  fprintf(stdout,"instr_count = %d has reached instr_limit\n",icount);

	else 
	  fprintf(stdout,"simulation has reached timeout at %d cycles",timeout);

	fflush(stdout);
	fclose(regfile);
	tf_dofinish();
      }

    }


}

void dumpr()
{
  int i,j;
  handle reg;
  char hname[80];

  /*
    I-addr: 0x00001028
    GPR00: 0x0000302c   GPR01: 0x0000584b   GPR02: 0x0000721b   GPR03: 0x00003797
    GPR04: 0x000075fa   GPR05: 0x000059ff   GPR06: 0x000075c9   GPR07: 0x000061bb
    GPR08: 0x00007631   GPR09: 0x000069bb   GPR10: 0x00004602   GPR11: 0x00000000
    GPR12: 0x00000000   GPR13: 0x00000000   GPR14: 0x00000000   GPR15: 0x00000000
    GPR16: 0x00000000   GPR17: 0x00000000   GPR18: 0x00000000   GPR19: 0x00000000
    GPR20: 0x00000000   GPR21: 0x00000000   GPR22: 0x00000000   GPR23: 0x00000000
    GPR24: 0x00000000   GPR25: 0x00000000   GPR26: 0x00000000   GPR27: 0x00000000
    GPR28: 0x00000000   GPR29: 0x00000000   GPR30: 0x00000000   GPR31: 0x00000000
    LKR: 0x00000000 CTR: 0x00000000 CR: 0x00000000 XER: 0x00000000
    MSR: 0x00006940 SRR0: 0x00000000 SRR1: 0x00000000
    --------------------
    */

  /* get the instr address */
  sprintf(hname,"%s","test_arm.arm10.PC");
  reg = acc_handle_object(hname);
  fprintf(regfile, "I-addr: 0x%s\n",acc_fetch_value(reg,"%x"));

  /* get the gpr register values */
  for(i=0;i<3;i++){
    for(j=0;j<4;j++){
      sprintf(hname,"%s%d","test_arm.arm10.r",i*4 + j);
      reg = acc_handle_object(hname);
      fprintf(regfile, "GPR%02d: 0x%s   ",i*4 + j,acc_fetch_value(reg,"%x"));
    }
    fprintf(regfile,"\n");
  }

  /* get special variables */
	reg=acc_handle_object("test_arm.arm10.CPSR");
	fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));

        reg=acc_handle_object("test_arm.arm10.SPSR_fiq");
        fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_svc");
        fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_abt");
        fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_irq");
        fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_und");
        fprintf(regfile, "CPSR: 0x%s\n",acc_fetch_value(reg,"%x"));

/* kept around as an example of how they did it for puma
  sprintf(&hname,"%s","test_fxu_main.fxu.core.rf.misc.srr1");
  reg = acc_handle_object(hname);
  fprintf(regfile, "SRR1: 0x%s\n",acc_fetch_value(reg,"%x"));
*/
  fprintf(regfile,"--------------------\n");

  fflush(NULL);

}

void simdumpr()
{
  int i,j;
  handle reg;
  char hname[80];

  /*
    I-addr: 0x00001028
    GPR00: 0x0000302c   GPR01: 0x0000584b   GPR02: 0x0000721b   GPR03: 0x00003797
    GPR04: 0x000075fa   GPR05: 0x000059ff   GPR06: 0x000075c9   GPR07: 0x000061bb
    GPR08: 0x00007631   GPR09: 0x000069bb   GPR10: 0x00004602   GPR11: 0x00000000
    GPR12: 0x00000000   GPR13: 0x00000000   GPR14: 0x00000000   GPR15: 0x00000000
    GPR16: 0x00000000   GPR17: 0x00000000   GPR18: 0x00000000   GPR19: 0x00000000
    GPR20: 0x00000000   GPR21: 0x00000000   GPR22: 0x00000000   GPR23: 0x00000000
    GPR24: 0x00000000   GPR25: 0x00000000   GPR26: 0x00000000   GPR27: 0x00000000
    GPR28: 0x00000000   GPR29: 0x00000000   GPR30: 0x00000000   GPR31: 0x00000000
    LKR: 0x00000000 CTR: 0x00000000 CR: 0x00000000 XER: 0x00000000
    MSR: 0x00006940 SRR0: 0x00000000 SRR1: 0x00000000
    --------------------
    */

  /*fprintf(stdout, "sim: time %d\n",tf_gettime());*/

  /* get the instr address */
  sprintf(hname,"%s","test_arm.arm10.PC");
  reg = acc_handle_object(hname);
  fprintf(stdout, "sim: reg pc=0x%s\n",acc_fetch_value(reg,"%x"));

  /* get the gpr register values */
  for(i=0;i<15;i++){
    sprintf(hname,"%s%d","test_arm.arm10.r",i);
    reg = acc_handle_object(hname);
    fprintf(stdout, "sim: reg r%d=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }

  /* get the banked register values */
  for(i=8;i<15;i++){ // FIQ banked regs
  	sprintf(hname,"test_arm.arm10.r%d",i+8);
	reg=acc_handle_object(hname);
	fprintf(stdout, "sim: reg r%d_fiq=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }

  for(i=13;i<15;i++){ // SVC banked regs
        sprintf(hname,"test_arm.arm10.r%d",i+10);
        reg=acc_handle_object(hname);
        fprintf(stdout, "sim: reg r%d_svc=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }

  for(i=13;i<15;i++){ // ABT banked regs
        sprintf(hname,"test_arm.arm10.r%d",i+12);
        reg=acc_handle_object(hname);
        fprintf(stdout, "sim: reg r%d_abt=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }

  for(i=13;i<15;i++){ // IRQ banked regs
        sprintf(hname,"test_arm.arm10.r%d",i+14);
        reg=acc_handle_object(hname);
        fprintf(stdout, "sim: reg r%d_irq=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }

  for(i=13;i<15;i++){ // UND banked regs
        sprintf(hname,"test_arm.arm10.r%d",i+16);
        reg=acc_handle_object(hname);
        fprintf(stdout, "sim: reg r%d_und=0x%s\n",i,acc_fetch_value(reg,"%x"));
  }


  /* get program status registers */
        reg=acc_handle_object("test_arm.arm10.CPSR");
        fprintf(stdout, "sim: reg CPSR=0x%s\n",acc_fetch_value(reg,"%x"));

        reg=acc_handle_object("test_arm.arm10.SPSR_fiq");
        fprintf(stdout, "sim: reg SPSR_fiq=0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_svc");
        fprintf(stdout, "sim: reg SPSR_svc=0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_abt");
        fprintf(stdout, "sim: reg SPSR_abt=0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_irq");
        fprintf(stdout, "sim: reg SPSR_irq=0x%s\n",acc_fetch_value(reg,"%x"));


        reg=acc_handle_object("test_arm.arm10.SPSR_und");
        fprintf(stdout, "sim: reg SPSR_und=0x%s\n",acc_fetch_value(reg,"%x"));


  fflush(stdout);
  fflush(NULL);

}

void reopen()
{
  char *filename;

  /* open a file to write register values to */
  filename=(char *)tf_getcstringp(1);
  if((regfile=(fopen(filename,"a")))==NULL) {
    tf_error("Cannot open '%s' file for appending\n",filename);
    tf_dofinish();
  }
}

void init_verify()
{
  /* set up the verification environment */
  verify_enable = 1;
}

void save_store()
{
  int	store_addr;
  int	store_data;
  handle bus;

  bus=acc_handle_object("test_arm.arm10.addr_bus");
  store_addr = atoi(acc_fetch_value(bus,"%d"));
  bus=acc_handle_object("test_arm.arm10.data_bus");
  store_data = atoi(acc_fetch_value(bus,"%d"));

  store_tail->addr = store_addr;
  store_tail->data = store_data;

  /*fprintf(stdout,"log_store: 0x%08x=0x%08x\n",
                  store_tail->addr,store_tail->data);*/

  /* increment the tail to point at the next free entry */
  INC_PTR(store_tail,store_head,STORE_BUFFER_SIZE);

  if(verify_enable && (store_head == store_tail)){
    tf_error("The store buffer has wrapped around... exiting...\n");
    tf_dofinish();
  }
}

void send_stores()
{
  /* temporary ptr to step through the buffer */
  struct Store_Record *store_ptr;

  /* print all stores in the buffer */
  for(store_ptr = store_head; store_ptr < store_tail; store_ptr++){
    fprintf(stdout, "sim: 0x%08x=0x%08x\n",store_ptr->addr,store_ptr->data);
  }

  /* reset the buffer */
  store_tail = store_head;

  fflush(stdout);
  fflush(NULL);

}