host.vhd

arm9_fpga2_verilog是一个可以综合的用verilog写的arm9的ip软核

      memData(53) := 16#e2500001#;
      memData(54) := 16#e3b020ff#;
      memData(55) := 16#e0301002#;
      memData(56) := 16#e2700001#;
      memData(57) := 16#e0b00000#;
      memData(58) := 16#e0d00000#;
      memData(59) := 16#e0f02002#;
      memData(60) := 16#e2522001#;
      memData(61) := 16#e1911002#;
      memData(62) := 16#e3b00001#;
      memData(63) := 16#e1d03002#;   
      memData(64) := 16#e1901e21#;   
      memData(65) := 16#e2911001#; 
      memData(66) := 16#e2900801#; 
      memData(67) := 16#e02d1190#;
      memData(68) := 16#e0500113#;
      memData(69) := 16#e0100fe3#;
      memData(70) := 16#e09330c1#;
      memData(71) := 16#e2122000#;
      memData(72) := 16#e2111000#;
      memData(73) := 16#e1a0f00e#;
      memData(74) := 16#e3a00106#;
      memData(75) := 16#e3a01004#;
      memData(76) := 16#e0832091#;
      memData(77) := 16#e0c54091#;
      memData(78) := 16#e1a0f00e#;
      memData(79) := 16#e3a00000#;
      memData(80) := 16#e3a0100a#;
      memData(81) := 16#e3a02064#;
      memData(82) := 16#e3a03ffa#;
      memData(83) := 16#e3a04902#;   
      memData(84) := 16#e4a41008#;   
      memData(85) := 16#e4a42008#; 
      memData(86) := 16#e4a43008#; 
      memData(87) := 16#e7a43002#;
      memData(88) := 16#e6148002#;
      memData(89) := 16#e3a01000#;
      memData(90) := 16#e3a02000#;
      memData(91) := 16#e3a03000#;
      memData(92) := 16#e5341008#;
      memData(93) := 16#e5342008#;   
      memData(94) := 16#e5343008#;   
      memData(95) := 16#e1a0f00e#; 
      memData(96) := 16#e3a00000#; 
      memData(97) := 16#e3a01001#;
      memData(98) := 16#e3a02002#;
      memData(99) := 16#e3a03003#;
      memData(100) := 16#e3a04801#;
      memData(101) := 16#e3a05803#;
      memData(102) := 16#e3a06807#;
      memData(103) := 16#e3a0780f#;
      memData(104) := 16#e3a08902#;
      memData(105) := 16#e2888008#;
      memData(106) := 16#e3a09901#;
      memData(107) := 16#e8a800ff#;
      memData(108) := 16#e0ccd899#;
      memData(109) := 16#e89900ff#;
      memData(110) := 16#e93800ff#;
      memData(111) := 16#e9a800ff#;
      memData(112) := 16#e89900ff#;        
      memData(113) := 16#e83800ff#; 
      memData(114) := 16#e82800ff#; 
      memData(115) := 16#e89900ff#; 
      memData(116) := 16#e9b800ff#; 
      memData(117) := 16#e92800ff#;     
      memData(118) := 16#e89900ff#; 
      memData(119) := 16#e8b800ff#; 
      memData(120) := 16#e89900ff#; 
      memData(121) := 16#eef00f00#;
      memData(122) := 16#eef00f01#;
      memData(123) := 16#eeff0f0f#;
      memData(124) := 16#e1a0f00e#; 
      memData(125) := 16#e3a00000#;
      memData(126) := 16#e3a01001#;
      memData(127) := 16#e3a02002#;
      memData(128) := 16#e3a03903#;
      memData(129) := 16#e1030091#;
      memData(130) := 16#e1032092#;
      memData(131) := 16#e1032093#;
      memData(132) := 16#e1030090#;
      memData(133) := 16#e1430090#;
      memData(134) := 16#e1030090#;
      memData(135) := 16#e1a0f00e#;
      memData(136) := 16#e3a00010#;
      memData(137) := 16#e3a01011#;
      memData(138) := 16#e3a02012#;
      memData(139) := 16#e3a03013#;
      memData(140) := 16#e3a04017#;
      memData(141) := 16#e3a0501b#;
      memData(142) := 16#e3a0601f#;
      memData(143) := 16#e3a0720f#;
      memData(144) := 16#e3a08102#;
      memData(145) := 16#e129f001#;
      memData(146) := 16#e169f007#;
      memData(147) := 16#e14f8000#;
      memData(148) := 16#e14f9000#;
      memData(149) := 16#e14fa000#;
      memData(150) := 16#e14fb000#;
      memData(151) := 16#e14fc000#;
      memData(152) := 16#e14fd000#;
      memData(153) := 16#e14fe000#;
      memData(154) := 16#e129f002#;
      memData(155) := 16#e169f008#;
      memData(156) := 16#e14fd000#;
      memData(157) := 16#e14fe000#;
      memData(158) := 16#e129f003#;
      memData(159) := 16#e169f007#;
      memData(160) := 16#e14fa000#;
      memData(161) := 16#e1a0300e#;
      memData(162) := 16#e129f004#;
      memData(163) := 16#e169f008#;
      memData(164) := 16#e14fd000#;
      memData(165) := 16#e14fe000#;
      memData(166) := 16#e129f005#;
      memData(167) := 16#e169f007#;  
      memData(168) := 16#e14fd000#;  
      memData(169) := 16#e14fe000#;
      memData(170) := 16#e129f006#;
      memData(171) := 16#e10fd000#;
      memData(172) := 16#e1a0e003#;
      memData(173) := 16#e129f000#;
      memData(174) := 16#e129f007#;
      memData(175) := 16#e128f008#;  
      memData(176) := 16#e328f20a#;
      memData(177) := 16#e10f9000#;  
      memData(178) := 16#e1a0f00e#;
      memData(179) := 16#eea21103#;
      memData(180) := 16#0e521243#;
      memData(181) := 16#eeb53216#;
      memData(182) := 16#ee054616#;
      memData(183) := 16#0ef53356#;
      memData(184) := 16#edb53106#;
      memData(185) := 16#ed253106#;
      memData(186) := 16#ecb54206#;
      memData(187) := 16#ec254206#;
      memData(188) := 16#ec955306#;
      memData(189) := 16#ed855306#;
      memData(190) := 16#e1a0f00e#;
      memData(191) := 16#eef00f10#;
      memData(192) := 16#eef11f10#;
      memData(193) := 16#eef22f10#;
      memData(194) := 16#eef33f10#;
      memData(195) := 16#eef44f10#;
      memData(196) := 16#eef55f10#;
      memData(197) := 16#eef66f10#;
      memData(198) := 16#eef77f10#;
      memData(199) := 16#eef88f10#;
      memData(200) := 16#eef99f10#;
      memData(201) := 16#eefaaf10#;
      memData(202) := 16#e3a0ba01#;
      memData(203) := 16#e88b07ff#;
      memData(204) := 16#e3a0a000#;
      memData(205) := 16#ecea0f08#;
      memData(206) := 16#e35a0a02#;
      memData(207) := 16#1afffffc#;
      memData(208) := 16#e1a0f00e#;


    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    memData );

    --------------------------------------------------------------------
    --
    --  Write the block RAM buffer offset and memory address
    --  to the first control register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000000#; -- First control register for Left Mem
    dwordCount := 1;
    regData(0) := 16#00000000#; -- Offset  : bits 31 downto 23 = 0x000
                                -- Address : bits 22 downto  0 = 0x000
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    regData );

    --------------------------------------------------------------------
    --
    --  Write the memory access type and DWORD count
    --  to the second control register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000001#; -- Second control register for Left Mem
    dwordCount := 1;
    --Program Length = DWORD count (bits 8 downto 0)  
    --Easiest to just pick a value larger than the actual length 
    regData(0) := 16#00000100#; -- Write_Sel_n : bit 20          = 0
                                -- DWORD count : bits 8 downto 0 = 256
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    regData );

    --------------------------------------------------------------------
    --
    --  Trigger the memory write by writing to the third register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000003#; -- Third control register for Left Mem
    dwordCount := 1;
    regData(0) := 16#00000000#;  -- Don't care
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    regData );

    --------------------------------------------------------------------
    --
    --  Read the status of the memory write
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000000#; -- Status register for Left Mem
    dwordCount := 1;
    Done := FALSE;
    while ( not Done ) loop
      WS_ReadPeReg ( Cmd_Req,
                     Cmd_Ack,
                     board,
                     peNum,
                     dwordOffset,
                     dwordCount,
                     regData );
      if ( regData(0) mod 2 = 1 ) then
        assert FALSE
          report "PE1 left mem bank write has completed"
          severity NOTE;
        Done := TRUE;
      end if;
      wait for 1 us;
    end loop;

    --END REPEAT (for programs longer than 256 instructions)

    --------------------------------------------------------------------
    --
    --  Fill up the block RAM with data to be written to memory.
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000100#; -- Block RAM for Mem
    dwordCount := 8;
    for i in 0 to 7 loop
      memData(i) := 0;
    end loop;
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    memData );

    --------------------------------------------------------------------
    --
    --  Write the block RAM buffer offset and memory address
    --  to the first control register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000000#; -- First control register for Mem
    dwordCount := 1;
    regData(0) := 16#00001000#; -- Offset  : bits 31 downto 23 = 0x000
                                -- Address : bits 22 downto  0 = 0x000
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    regData );
    
    --------------------------------------------------------------------
    --
    --  Write the memory access type and DWORD count
    --  to the second control register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;
    dwordOffset := 16#00000001#; -- Second control register for Left Mem
    dwordCount := 1;
    regData(0) := 16#00000008#; -- Write_Sel_n : bit 20          = 0
                                -- DWORD count : bits 7 downto 0 = 256
    WS_WritePeReg ( Cmd_Req,
                    Cmd_Ack,
                    board,
                    peNum,
                    dwordOffset,
                    dwordCount,
                    regData );
    
    --------------------------------------------------------------------
    --
    --  Trigger the memory write by writing to the third register
    --
    --------------------------------------------------------------------
    peNum := WS_PE1;