do.do

Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核

#/////////////////////////////////////////////////////////////////////
#///                                                              ////
#///  do.do                                                       ////
#///                                                              ////
#///  This file is part of the Ethernet IP core project           ////
#///  http://www.opencores.org/projects/ethmac/                   ////
#///                                                              ////
#///  Author(s):                                                  ////
#///      - Igor Mohor ([e-mail])                      ////
#///                                                              ////
#///  All additional information is avaliable in the Readme.txt   ////
#///  file.                                                       ////
#///                                                              ////
#/////////////////////////////////////////////////////////////////////
#///                                                              ////
#/// Copyright (C) 2001, 2002 Authors                             ////
#///                                                              ////
#/// This source file may be used and distributed without         ////
#/// restriction provided that this copyright statement is not    ////
#/// removed from the file and that any derivative work contains  ////
#/// the original copyright notice and the associated disclaimer. ////
#///                                                              ////
#/// This source file is free software; you can redistribute it   ////
#/// and/or modify it under the terms of the GNU Lesser General   ////
#/// Public License as published by the Free Software Foundation; ////
#/// either version 2.1 of the License, or (at your option) any   ////
#/// later version.                                               ////
#///                                                              ////
#/// This source is distributed in the hope that it will be       ////
#/// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
#/// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
#/// PURPOSE.  See the GNU Lesser General Public License for more ////
#/// details.                                                     ////
#///                                                              ////
#/// You should have received a copy of the GNU Lesser General    ////
#/// Public License along with this source; if not, download it   ////
#/// from http://www.opencores.org/lgpl.shtml                     ////
#///                                                              ////
#/////////////////////////////////////////////////////////////////////
#/
#/ CVS Revision History
#/
#/ $Log: do.do,v $
#/ Revision 1.1  2002/09/17 18:46:09  mohor
#/ Modelsim simulation environment should be ready now.
#/
#/
#/
#/

do ../run/tb_eth.do