📄 ddfs.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 05/12/2005 10:22:56
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "ddfs"
BEGIN
DEVICE = "EPM7128SLC84-15";
"clk" : INPUT_PIN = 83 ;
"datin0" : INPUT_PIN = 4 ; -- LC16
"datin1" : INPUT_PIN = 5 ; -- LC14
"datin2" : INPUT_PIN = 6 ; -- LC13
"datin3" : INPUT_PIN = 8 ; -- LC11
"datin4" : INPUT_PIN = 9 ; -- LC8
"datin5" : INPUT_PIN = 10 ; -- LC6
"datin6" : INPUT_PIN = 11 ; -- LC5
"datin7" : INPUT_PIN = 12 ; -- LC3
"P12" : INPUT_PIN = 1 ;
"addr0" : OUTPUT_PIN = 81 ; -- LC128
"addr1" : OUTPUT_PIN = 80 ; -- LC126
"addr2" : OUTPUT_PIN = 79 ; -- LC125
"addr3" : OUTPUT_PIN = 77 ; -- LC123
"addr4" : OUTPUT_PIN = 76 ; -- LC120
"addr5" : OUTPUT_PIN = 75 ; -- LC118
"addr6" : OUTPUT_PIN = 74 ; -- LC117
"addr7" : OUTPUT_PIN = 73 ; -- LC115
"addr8" : OUTPUT_PIN = 70 ; -- LC109
"addr9" : OUTPUT_PIN = 69 ; -- LC107
"addr10" : OUTPUT_PIN = 68 ; -- LC105
"wr" : OUTPUT_PIN = 65 ; -- LC101
"P13" : BIDIR_PIN = 67 ; -- LC104
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|cout_node" : LOCATION = LC50 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|gcp2" : LOCATION = LC44 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|g4" : LOCATION = LC39 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node0" : LOCATION = LC40 ; -- PIN 28
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC46 ; -- PIN 24
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node3" : LOCATION = LC48 ; -- PIN 23
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node4" : LOCATION = LC53 ; -- PIN 39
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node5" : LOCATION = LC62 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node6" : LOCATION = LC63 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder0|result_node7" : LOCATION = LC64 ; -- PIN 33
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|cout_node" : LOCATION = LC91 ; -- PIN 58
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|g2cp2" : LOCATION = LC96 ; -- PIN 62
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|g4" : LOCATION = LC93 ; -- PIN 60
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node0" : LOCATION = LC87 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node1" : LOCATION = LC29 ; -- PIN 15
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node2" : LOCATION = LC95 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node3" : LOCATION = LC83 ; -- PIN 54
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node4" : LOCATION = LC85 ; -- PIN 55
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node5" : LOCATION = LC86 ; -- PIN 56
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node6" : LOCATION = LC88 ; -- PIN 57
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder1|result_node7" : LOCATION = LC94 ; -- PIN 61
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|cout_node" : LOCATION = LC71 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|g2cp2" : LOCATION = LC72 ; -- PIN 48
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|g4" : LOCATION = LC73 ; -- PIN 49
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node0" : LOCATION = LC74 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node1" : LOCATION = LC9 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node2" : LOCATION = LC77 ; -- PIN 51
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node3" : LOCATION = LC66 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node4" : LOCATION = LC68 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node5" : LOCATION = LC78 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node6" : LOCATION = LC67 ; -- PIN 45
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder2|result_node7" : LOCATION = LC69 ; -- PIN 46
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node0" : LOCATION = LC114 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node1" : LOCATION = LC116 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node2" : LOCATION = LC122 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node3" : LOCATION = LC127 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node4" : LOCATION = LC124 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node5" : LOCATION = LC119 ;
"|LPM_ADD_SUB:2672|addcore:adder|addcore:adder3|result_node6" : LOCATION = LC121 ;
"state~1" : LOCATION = LC56 ; -- PIN 37
"state~2" : LOCATION = LC55 ;
"state~3" : LOCATION = LC54 ;
":37" : LOCATION = LC80 ; -- PIN 52 -- count30
":38" : LOCATION = LC113 ; -- count29
":39" : LOCATION = LC23 ; -- count28
":40" : LOCATION = LC17 ; -- PIN 22 -- count27
":41" : LOCATION = LC28 ; -- count26
":42" : LOCATION = LC27 ; -- PIN 16 -- count25
":43" : LOCATION = LC25 ; -- PIN 17 -- count24
":44" : LOCATION = LC22 ; -- count23
":46" : LOCATION = LC21 ; -- PIN 20 -- count21
":47" : LOCATION = LC20 ; -- count20
":48" : LOCATION = LC26 ; -- count19
":49" : LOCATION = LC24 ; -- PIN 18 -- count18
":50" : LOCATION = LC65 ; -- PIN 44 -- count17
":51" : LOCATION = LC18 ; -- count16
":52" : LOCATION = LC19 ; -- PIN 21 -- count15
":53" : LOCATION = LC30 ; -- count14
":54" : LOCATION = LC31 ; -- count13
":55" : LOCATION = LC32 ; -- PIN 14 -- count12
":56" : LOCATION = LC2 ; -- count11
":57" : LOCATION = LC8 ; -- PIN 9 -- count10
":58" : LOCATION = LC79 ; -- count9
":59" : LOCATION = LC4 ; -- count8
":60" : LOCATION = LC70 ; -- count7
":61" : LOCATION = LC76 ; -- count6
":62" : LOCATION = LC75 ; -- PIN 50 -- count5
":63" : LOCATION = LC12 ; -- count4
":64" : LOCATION = LC11 ; -- PIN 8 -- count3
":65" : LOCATION = LC10 ; -- count2
":66" : LOCATION = LC43 ; -- PIN 27 -- count1
":67" : LOCATION = LC1 ; -- count0
":68" : LOCATION = LC51 ; -- PIN 40 -- rule23
":69" : LOCATION = LC36 ; -- rule22
":70" : LOCATION = LC34 ; -- rule21
":71" : LOCATION = LC33 ; -- rule20
":72" : LOCATION = LC49 ; -- PIN 41 -- rule19
":73" : LOCATION = LC42 ; -- rule18
":74" : LOCATION = LC58 ; -- rule17
":75" : LOCATION = LC41 ; -- rule16
":76" : LOCATION = LC81 ; -- rule15
":77" : LOCATION = LC82 ; -- rule14
":78" : LOCATION = LC84 ; -- rule13
":79" : LOCATION = LC47 ; -- rule12
":80" : LOCATION = LC90 ; -- rule11
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