pack_control.v

具备GMII接口和ARP协议功能的千兆以太网控制器。经过Xilinx SPATAN-III FPGA验证, Verilog描述

module pack_control(
                    clk,
                    rst,
                    /**user setting**/
                    s_des_ip,
                    /**the data info fifo**/
                    u_empty,
                    /***the udp destination ip and mac add****/
                    a_des_add,
                    a_des_ip,
                    /****the arp request host's add and ip fifo*******
                    ********need to reply*****************************/  
                    r_empty,
                    r_des_add,                 
                    /*****the interface to the udp****/
                    u_des_ip,              
                    send_udp,
                    udp_over,
                    udata_i,
                    udp_ing,
                    /****the interface to the arp and rarp***/
                    send_arp,
                    arp_over,
                    adata_i,
                    send_rarp,
                    rarp_over,
                    sarp_ing,
                    /***the interface from the mac sublayer***/
                    full,     
                    desadd_o,
                    data_o,
                    send_ing                   
                    );

	input clk;
	input rst;
	input[31:0] s_des_ip;
	input u_empty;
	
	input[47:0] a_des_add;
	input[31:0] a_des_ip;	

	input r_empty;
	input[47:0] r_des_add;
	
        //
       
        output[31:0] u_des_ip;
        reg[31:0] u_des_ip;        
        output send_udp;
        reg send_udp;
        input udp_over;
        input[7:0] udata_i; 
        input udp_ing;
        
        output send_arp;
        reg send_arp;
        input arp_over;
        input[7:0] adata_i;
        output send_rarp;
        reg send_rarp;
        input rarp_over;
        input sarp_ing;
        
        input full;        
 
        output[47:0] desadd_o;
		reg[47:0] desadd_o;
        output[7:0] data_o;
		reg[7:0] data_o;
        output send_ing;
        reg send_ing;
        
	  reg[47:0] u_des_add;
        reg[5:0] current;
        reg[5:0] next;
        
        reg[19:0] counter;
        
        parameter IDLE=6'b0000_01, UDP=6'b0000_10, ARP=6'b0001_00,
                  WAI=6'b0010_00, RENEW=6'b0100_00, RARP=6'b1000_00;

always@(current or u_des_add or r_des_add or adata_i or udata_i or sarp_ing or udp_ing)
begin
	desadd_o=48'h0000_0000_0000;
	data_o=8'hxx;
	send_ing=1'b0;
	case(current)
	ARP: begin
		desadd_o=48'hffff_ffff_ffff;
		data_o=adata_i;
		send_ing=sarp_ing;
	end
	UDP:begin
		desadd_o=u_des_add;
		data_o=udata_i;
		send_ing=udp_ing;
	end
	RARP:begin
		desadd_o=r_des_add;
		data_o=adata_i;
		send_ing=sarp_ing;
	end
	default: begin
		desadd_o=u_des_add;
	end
	endcase
end
	
always@(current or full or s_des_ip or u_des_ip or a_des_ip or counter
        or u_empty or r_empty or arp_over or udp_over or rarp_over)
begin
	next=6'bxxxx_xx;
	case(current)
	IDLE: begin
		if(!full) begin
			if(!r_empty)
			next=RARP;
			else if(s_des_ip!=u_des_ip)
			next=ARP;
			else if(!u_empty)
			next=UDP;
			else
			next=IDLE;
		end
		else next=IDLE;
	end
	UDP: begin
		if(udp_over)
		next=IDLE;
		else
		next=UDP;
	end
	ARP: begin
		if(arp_over)
		next=WAI;
		else
		next=ARP;
	end
	RARP: begin
		if(rarp_over)
		next=IDLE;
		else
		next=RARP;
	end
	WAI: begin
		if(counter==20'hffff_f)
		next=ARP;
		else if(s_des_ip==a_des_ip)
		next=RENEW;
		else
		next=WAI;
	end
	RENEW: begin
		next=IDLE;
	end
	default: next=IDLE;
	endcase
end

always@(posedge clk or negedge rst)
begin
	if(!rst) current<=IDLE;
	else current<=next;
end
/********************the send_udp, send_arp, send_rarp***********/
always@(posedge clk or negedge rst)
begin
	if(!rst) begin
		send_udp<=1'b0;
		send_arp<=1'b0;
		send_rarp<=1'b0;
	end
	else begin
		case(next)

		UDP: begin
			if(current!=UDP)
			send_udp<=1'b1;
			else
			send_udp<=1'b0;
		end
		ARP: begin
			if(current!=ARP)
			send_arp<=1'b1;
			else
			send_arp<=1'b0;
		end
		RARP: begin
			if(current!=RARP)
			send_rarp<=1'b1;
			else
			send_rarp<=1'b0;
		end
		default: begin
			send_rarp<=1'b0;
			send_rarp<=1'b0;
			send_udp<=1'b0;
		end
		endcase
	end
end
/**********************u_des_add and u_des_ip************/
always@(posedge clk or negedge rst)
begin
	if(!rst) begin
		u_des_add<=48'h0000_0000_0000;
		u_des_ip<=32'h0000_0000;
	end
	else begin
		if(next==RENEW)
		begin
			u_des_add<=a_des_add;
			u_des_ip<=a_des_ip;
		end
	end
end		
/*******************the wait time counter************************/
always@(posedge clk or negedge rst)
begin
	if(!rst) begin
		counter<=20'h0000_0;
	end
	else begin
		if(next==WAI)
		counter<=counter+1;
		else
		counter<=20'h0000_0;
	end
end
		
endmodule